Datasheet

 2011 Microchip Technology Inc. DS22067J-page 15
11XX
4.6 Write Status Register (WRSR)
Instruction
The WRSR instruction allows the user to select one of
four levels of protection for the array by writing to the
appropriate bits in the STATUS register. The array is
divided up into four segments. The user has the ability
to write-protect none, one, two, or all four of the seg-
ments of the array. The partitioning is controlled as
illustrated in Table 4-3.
After transmitting the STATUS register data, the master
must transmit a NoMAK during the Acknowledge
sequence in order to initiate the internal write cycle.
TABLE 4-3: ARRAY PROTECTION
TABLE 4-4: PROTECTED ARRAY ADDRESS LOCATIONS
FIGURE 4-7: WRITE STATUS REGISTER COMMAND SEQUENCE
Note: The WRSR instruction must be termi-
nated with a NoMAK following the data
byte. If a NoMAK is not received at this
point, the command will be considered
invalid, and the device will go into Idle
mode without responding with a SAK or
executing the command.
BP1 BP0 Address Ranges Write-Protected Address Ranges Unprotected
00 None All
01 Upper 1/4 Lower 3/4
10 Upper 1/2 Lower 1/2
11 All None
Density Upper 1/4 Upper 1/2 All Sectors
1K 60h-7Fh 40h-7Fh 00h-7Fh
2K C0h-FFh 80h-FFh 00h-FFh
4K 180h-1FFh 100h-1FFh 000h-1FFh
8K 300h-3FFh 200h-3FFh 000h-3FFh
16K 600h-7FFh 400h-7FFh 000h-7FFh
11010100
Start Header
SCIO
Device Address
MAK
00
(1)
001010
MAK
Command
10101101
MAK
NoSAK
SAK
Standby Pulse
SCIO
SAK
7654
Status Register Data
3210
NoMAK
SAK
Twc
Note 1: For the 11XXXX1, this bit must be a ‘1’.