Datasheet
2011 Microchip Technology Inc. DS22067J-page 13
11XX
4.4 Write Enable (WREN) and Write
Disable (WRDI) Instructions
The 11XX contains a write enable latch. See Table 6-1
for the Write-Protect Functionality Matrix. This latch
must be set before any write operation will be com-
pleted internally. The
WREN instruction will set the
latch, and the
WRDI instruction will reset the latch.
The following is a list of conditions under which the
write enable latch will be reset:
• Power-up
•
WRDI instruction successfully executed
• WRSR instruction successfully executed
•
WRITE instruction successfully executed
• ERAL instruction successfully executed
• SETAL instruction successfully executed
FIGURE 4-4: WRITE ENABLE COMMAND SEQUENCE
FIGURE 4-5: WRITE DISABLE COMMAND SEQUENCE
Note: The WREN and WRDI instructions must
be terminated with a NoMAK following
the command byte. If a NoMAK is not
received at this point, the command will
be considered invalid, and the device
will go into Idle mode without respond-
ing with a SAK or executing the com-
mand.
11010100
Start Header
SCIO
Device Address
MAK
00
(1)
001010
MAK
Command
10010011
NoMAK
NoSAK
SAK
Standby Pulse
SCIO
SAK
Note 1: For the 11XXXX1, this bit must be a ‘1’.
11010100
Start Header
SCIO
Device Address
MAK
00
(1)
001010
MAK
Command
01010010
NoMAK
NoSAK
SAK
Standby Pulse
SCIO
SAK
Note 1: For the 11XXXX1, this bit must be a ‘1’.