Specifications

Micrel, Inc.
KSZ8895MQ/RQ/FMQ
Address Name Description Mode Default
Register 191(0xBF): Testing Register
7−0
Reserved N/A RO 0x80
Register 207(0xCF): Reserved Control Register
7−0
Reserved
N/A Do not change.
RO 0x15
Register 223(0xDF): Test Register 2
7−0
Reserved R/W 0x0C
Register 239(0xEF): Test Register 3
7−0
Reserved
N/A Do not change.
RO 0x32
Register 255(0xFF): Testing Register4
7 Reserved
N/A Do not change.
RO 0
6
Invert phase of SMTXC clock
input for SW5-RMII
(Used for KSZ8895RQ only)
1 = Invert the phase of SMTXC clock input in RMII
mode, set this bit at normal mode device when
connect two devices with SW5-RMII back to back
connection case only. Please see strap pin LED2_2
for normal mode.
0 = normal phase if SMTXC clock input
Note: MQ/FMQ are reserved with read only for this
bit.
R/W 0
5−0
Reserved
N/A Do not change.
RO 000000
March 12, 2014
91
Revision 1.7