Specifications
Micrel, Inc.
KSZ8895MQ/RQ/FMQ
Advanced Control Registers (Continued)
Address Name Description Mode Default
Register 176 (0xB0): Port 1 Control 8
Register 192 (0xC0): Port 2 Control 8
Register 208 (0xD0): Port 3 Control 8
Register 224 (0xE0): Port 4 Control 8
Register 240 (0xF0): Port 5 Control 8
7−4
Reserved RO 0000
3
Insert Source Port PVID for
Untagged Packet Destination
to Highest Egress Port
Note: Enabled by the register
135 bit 2
Register 176: insert source Port 1 PVID for
untagged frame at egress Port 5
Register 192: insert source Port 2 PVID for
untagged frame at egress Port 5
Register 208: insert source Port 3 PVID for
untagged frame at egress Port 5
Register 224: insert source Port 4 PVID for
untagged frame at egress Port 5
Register 240: insert source Port 5 PVID for
untagged frame at egress Port 4
R/W 0
2
Insert Source Port PVID for
Untagged Packet Destination
to Second Highest Egress Port
Note: Enabled by the register
135 bit 2
Register 176: insert source Port 1 PVID for
untagged frame at egress pPort 4
Register 192: insert source Port 2 PVID for
untagged frame at egress Port 4
Register 208: insert source Port 3 PVID for
untagged frame at egress Port 4
Register 224: insert source Port 4 PVID for
untagged frame at egress Port 3
Register 240: insert source Port 5 PVID for
untagged frame at egress Port 3
R/W 0
1
Insert Source Port PVID for
Untagged Packet Destination
to Second Lowest Egress Port
Note: Enabled by the register
135 bit 2
Register 176: insert source Port 1 PVID for
untagged frame at egress Port 3
Register 192: insert source Port 2 PVID for
untagged frame at egress Port 3
Register 208: insert source Port 3 PVID for
untagged frame at egress Port 2
Register 224: insert source Port 4 PVID for
untagged frame at egress Port 2
Register 240: insert source Port 5 PVID for
untagged frame at egress Port 2
R/W 0
0
Insert Source Port PVID for
Untagged Packet Destination
to Lowest Egress Port
Note: Enabled by the register
135 bit 2
Register 176: insert source Port 1 PVID for
untagged frame at egress Port 2
Register 192: insert source Port 2 PVID for
untagged frame at egress Port 1
Register 208: insert source Port 3 PVID for
untagged frame at egress Port 1
Register 224: insert source Port 4 PVID for
untagged frame at egress Port 1
Register 240: insert source Port 5 PVID for
untagged frame at egress Port 1
R/W 0
March 12, 2014
83
Revision 1.7