Specifications

Micrel, Inc.
KSZ8895MQ/RQ/FMQ
Port Registers (Continued)
Register 27 (0x1B): Reserved
Register 43 (0x2B): Reserved
Register 59 (0x3B): Reserved
Register 75 (0x4B): Reserved
Register 91 (0x5B): Reserved
Address Name Description Mode Default
7−0
Reserved N/A Do not change. RO 0
Register 28 (0x1C): Port 1 Control 5
Register 44 (0x2C): Port 2 Control 5
Register 60 (0x3C): Port 3 Control 5
Register 76 (0x4C): Port 4 Control 5
Register 92 (0x5C): Port 5 Control 5
Address Name Description Mode Default
7 Disable Auto-Negotiation
1, disable auto-negotiation, speed and duplex are
decided by bit 6 and 5 of the same register.
0, auto-negotiation is on.
Note: The register bit value is the INVERT of the strap
value at the pin.
R/W
0
For Port 3/Port 4
only. INVERT of
pins
LED[2][1]/LED[5][0]
strap option.
PD(0): Disable
Auto-Negotiation.
PU(1): Enable
Auto-Negotiation.
Note:
LED[2][1]/LED[5][0]
have internal pull
up.
6 Forced Speed
1, forced 100BT if AN is disabled (bit 7).
0, forced 10BT if AN is disabled (bit 7).
R/W 1
5 Forced Duplex
1, forced full-duplex if (1) AN is disabled or (2) AN is
enabled but failed.
0, forced half-duplex if (1) AN is disabled or (2) AN is
enabled but failed (Default).
R/W
0
For Port 3/Port 4
only. Pins
LED1_0/PCRS
strap option:
1). Force half-
duplex mode:
LED1_0 pin Pull-
up(1) (default) for
Port 3
PCRS pin Pull-
down (0) (default)
for Port 4
2). Force full-
Duplex mode:
LED1_0 pin Pull-
down(0) for Port 3
PCRS Pull-up (1)
for Port 4.
Note: LED1_0 has
internal pull-up;
PCRS have
internal pull down.
March 12, 2014
70
Revision 1.7