Specifications

Micrel, Inc.
KSZ8895MQ/RQ/FMQ
Port Registers (Continued)
Address Name Description Mode Default
0 Two Queues Split Enable
This bit 0 in the register16/32/48/64/80 should be in
combination with Register177/193/209/225/241 bit 1
for Port 1-5 will select the split of ½/4 queues:
For Port 1, [Register 177 bit 1, Register 16 bit 0] =
[11], Reserved
[10], the port output queue is split into four priority
queues or if map 802.1p to priority 0-3 mode.
[01], the port output queue is split into two priority
queues or if map 802.1p to priority 0-3 mode.
[00], single output queue on the port. There is no
priority differentiation even though packets are
classified into high or low priority.
R/W 0
Register 17 (0x11): Port 1 Control 1
Register 33 (0x21): Port 2 Control 1
Register 49 (0x31): Port 3 Control 1
Register 65 (0x41): Port 4 Control 1
Register 81 (0x51): Port 5 Control 1
Address Name Description Mode Default
7 Sniffer Port
1, port is designated as sniffer port and will transmit
packets that are monitored.
0, port is a normal port.
R/W 0
6 Receive Sniff
1, all the packets received on the port will be marked
as “monitored packets” and forwarded to the
designated “sniffer port.”
0, no receive monitoring.
R/W 0
5 Transmit Sniff
1, all the packets transmitted on the port will be marked
as “monitored packets” and forwarded to the
designated “sniffer port.”
0, no transmit monitoring.
R/W 0
4−0
Port VLAN Membership
Define the port’s Port VLAN membership. Bit 4 stands
for Port 5, bit 3 for Port 4...bit 0 for Port 1. The port can
only communicate within the membership. A ‘1’
includes a port in the membership, a ‘0’ excludes a port
from membership.
R/W 0x1f
March 12, 2014
66
Revision 1.7