Specifications

Micrel, Inc.
KSZ8895MQ/RQ/FMQ
Global Registers (Continued)
Address Name Description Mode Default
Register 10 (0x0A): Global Control 8
7−0
Factory Testing N/A Do not change. RO 0x00
Register 11 (0x0B): Global Control 9
7 Reversed N/A Do not change. RO 0
6
Port 5 SW5- RMII
reference clock edge
select
RQ: Select the data sampling edge of Switch MAC5
SW5- RMII reference clock:
1 = data sampling on negative edge of refclk
0 = data sampling on positive edge of refclk (default)
Note: MQ/FMQ is reserved with read only for this bit.
R/W 0
5 Reserved N/A Do not change. RO 0
4 Reserved N/A Do not change. RO 0
3
PHY Power
Save
1 = disable PHY power save mode.
0 = enable PHY power save mode.
R/W 0
2 Reserved N/A Do not change. RO 0
1 LED Mode
0 = led mode 0.
1 = led mode 1.
Mode 0, link at
100/Full LEDx[2,1,0] = 0,0,0
100/Half LEDx[2,1,0] = 0,1,0
10/Full LEDx[2,1,0] = 0,0,1
10/Half LEDx[2,1,0] = 0,1,1
Mode 1, link at
100/Full LEDx[2,1,0] = 0,1,0
100/Half LEDx[2,1,0] = 0,1,1
10/Full LEDx[2,1,0] = 1,0,0
10/Half LEDx[2,1,0] = 1,0,1
(0 = LED on, 1 = LED off)
R/W
0
Pin SMRXD0 –
strap option. Pull-
down(0): Enabled
led mode 0. Pull-
up(1): Enabled
led mode 1.
Note: SMRXD0
has internal pull-
down 0.
Mode 0 Mode 1
LEDX_2 Lnk/Act 100Lnk/Act
LEDX_1 Fulld/Col 10Lnk/Act
LEDX_0 Speed Fulld
0
SPI/SMI read sampling
clock edge select
Select the SPI/SMI clock edge for sampling SPI/SMI
read data.
1 = trigger by rising edge of SPI/SMI clock (for high
speed SPI about 25MHz and SMI about 10MHz)
0 = trigger by falling edge of SPI/SMI clock.
R/W 0
March 12, 2014
62
Revision 1.7