Specifications

Micrel, Inc.

KSZ8895MQ/RQ/FMQ

Tail Tagging Mode

The Tail Tag is only seen and used by the Port 5 interface, which should be connected to a processor by SW5-

MII/RMII interface. The one byte tail tagging is used to indicate the source/destination port in Port 5. Only bit [3−0]

are used for the destination in the tail tagging byte. Other bits are not used. The Tail Tag feature is enabled by setting

Figure 12. Tail Tag Frame Format

Ingress to Port 5 (Host --> KSZ8895MQ/RQ/FMQ)

Bit [3:0] Destination

0,0,0,0 Reserved

0,0,0,1 Port 1 (direct forward to Port1)

0,0,1,0 Port 2 (direct forward to Port2)

0,1,0,0 Port 3 (direct forward to Port3)

1,0,0,0 Port 4 (direct forward to Port4)

1,1,1,1 Port 1, 2,3 and 4 (direct forward to Port 1,2,3,4,)

Bit[7:4]

0,0,0,0 Queue 0 is used at destination port

0,0,0,1 Queue 1 is used at destination port

0,0,1,0 Queue 2 is used at destination port

0,0,1,1 Queue 3 is used at destination port

x, 1,x,x Anyhow send packets to specified port in bits [3:0]

1, x,x,x Bit[6:0] will be ignored as normal (Adress look-up)

Egress from Port 5 (KSZ8895MQ/RQ/FMQ --> Host)

Bit [1:0] Source

0,0 Port 1 (packets from Port 1)

0,1 Port 2 (packets from Port 2)

1,0 Port 3 (packets from Port 3)

1,1 Port 4 (packets from Port 4)

Table 7. Tail Tag Rules

March 12, 2014

Revision 1.7