Specifications

72
Preliminary Information 42PQ30
VS Input from
the Y-SUS
P3
Z
Z
-
-
SUS Board Layout
SUS Board Layout
P6
Logic Signals from the Control PWB
Also +15V and +5V
P2
VZ (Z-Bias) TP
Right side
R49 or R50
Read the Label on the back of the
upper left hand side of the panel.
Z SUS
Output
ICs
Z-Bias ADJ VR8
No IPMs
P7
FPC
FPC
Z SUS
Waveform
Development
ICs
Z SUS
Waveform
Test Point
J27
Z Bias