Owner`s manual

Function Micro Input at Input at Input at Input at Notes:
port 0.250V 0.500V 4.500V 4.750V
I backfeed P0.0 V>+/-1V
Ibat, battery current. P0.1 133.27 125.45 2.00 -5.72* HTA-100
No. modules installed. P0.2 See below
No. modules OK. P0.3 See below
Vbat, battery voltage. P0.4 66.613 65.030 39.696 38.113
Vacin, RMS input volts. P0.5 143.51 127.52 127.52 143.51
Iacout., rms load current. P0.6 30.23 34.02 90.68pk 102.05pk
Vacout, RMS load volts. P0.7 143.51 127.52 127.52 143.51
In the chart above, (*) indicates negative current, however actual current ranges is always zero or greater. Zero
current voltage is +4.565.
MODSIN and MODSOK voltage is a function of the number of modules installed. The chart below gives the
expected voltage at P0.2 and P0.3. In each power module, there is a 10K resistor connected between MODSIN
and AGND and also between MODSOK and AGND for each micro.
MODSXX 0 1 2 3 4 5 6
P0.2, 3 0 1.4926 2.4917 3.2056 3.7412 4.1580 4.4914
4.8.1.4 Digital Inputs
The power module temperature warning is via a photo coupler connecting the NOTEMP terminal to AGND for each
processor. The processor will energize the “minor alarm” relay for this condition.
4.8.1.5 Alarm Relays
The microprocessor has a three alarm outputs:
◗ Major alarm will be by the de-energizing the alarm relay. Major alarm will be issued if the inverter can
not support the output load requirement.
◗ Minor alarm, which alerts the operator to a potential problem. Voltages or temperatures which are not
within limits will cause this alarm.
◗ “Utility” alarm relays will be energized when the AC input voltage to the inverter is not within its proper
operating limits (+10%, -15%) or the utility voltage frequency is not within limits, 50 +/-3Hz, or 60 +/-
3Hz. If Utility voltage is present and the system is set up to operate in the “OFF-LINE” mode, the
“Static Switch” will be turned ON so as to support the load.
4.8.1.6 “Watch Dog” Timer
The processor operates from a 16MHz crystal connected to its oscillator terminals. None of the internal ROM in the
processor is used. The processor must go through the code string every 250uSec. If it fails to do this, it means
that the program is not being followed and is probably “lost”. A hardware “watch dog” timer is implemented with R’s,
C’s, diode, and a “Schmitt” hex inverter gate. As long as the input to the timer is continuously reset, the micro will
operate normally. If it is not reset, a NMI signal is issued and the micro will load in the default values from the ROM.
If a redundant processor is available, the faulted micro will be inhibited and the redundant micro will be allowed to
operate via the optically isolated cross-coupled gates.
3.5 to 21 kVA N+1 Inverter
Theory of Operationpage 4 — 12