Service manual

16
RxDA, RxDB.
Receive Data (inputs, active High).
RESET.
Reset (input, active Low). Disables both
receivers and transmitters, forces TxDA and TxDB
marking, forces the modem controls High and
disables all interrupts.
RIA, RIB.
Ring Indicator (inputs, Active Low). These inputs
are similar to CTS and DCD. The Z-80 DART detects
both logic level transitions and interrupts the
CPU. When not used in switched-line applications,
these inputs can be used as general-purpose
inputs.
RTSA, RTSB.
Request to Send (outputs, active Low). When the
RTS bit is set, the RTS output goes Low. When the
RTS bit is reset, the output goes High after the
transmitter empties.
TxCA, TxCB.
Transmitter Clocks (inputs). TxD changes on the
falling edge of TxC. The Transmitter Clocks may
be 1, 16, 32 or 64 times the data rate; however,
the clock multiplier for the transmitter and the
receiver must be the same. The Transmit Clock
inputs are Schmitt-trigger buffered. Both the
Receiver and Transmitter Clocks may be driven by
the Z-80 CTC Counter Time Circuit for programmable
baud rate generation.
TxDA, TxDB.
Transmit Data (outputs, active High).
W/RDYA, W/RDYB.
Wait/Ready (outputs,open drain when programmed for
Wait function, driven High and Low when programmed
for Ready function). These dual-purpose outputs
may be programmed as Ready lines for a DMA
controller or as Wait lines that synchronize. the
CPU to the Z-80 DART data rate. The reset state
is open drain.
MTX Service Manual