Product specifications
The graphics pattern display colours can be any two of 16 (including
transparent) sectioned into groups of 8 characters.
The backdrop or border colour can be any one of 16 (including
transparent).
The character patterns can be dynamically changed to give any number
of character patterns limited by the amount of storage space in Z80 RAM
for the extra pattern libraries.
Sprites are available up to a maximum of 32.
The VDP is in Graphics 1 mode, when mode bits M1 = 0, M2 = 0 and M3 = 0 (see
section 2.2 register 1 bits 3 and 4).
One of the major advantages of this mode is that it is very compact, requiring a
maximum 2848 VRAM bytes for a complete set-up. Yet it is possible with some care
to create graphics effects very similar to those available in graphics 2 mode.
Like text mode, it is also possible to build up several different pattern libraries in
VRAM and several screens, and switch to a complete new graphics 1 mode set-up by
changing only two VDP write-only registers.
And again like text mode it is possible to have one pattern library held in the pattern
generator table, and to have up to 14 completely separate display screens, which can
be changed to a new screen by changing only one VDP write-only reg A,E ;Get data
byte
OUT (2),A ;Output data byte
LD A,D :Get control byte
AND 7 ;Set up correct control bits
OR 128 ;Set bits 6,0w
VRAMsub-block Length in bytes
Pattern generator table 2048
Pattern colour table 32
Pattern name table 768
The pattern generator table is 2048 bytes long and is split into 256 graphics patterns,
each of which is 8 bytes long.
Each block of eight bytes in the pattern generator library define a graphics pattern in
which the 1’s take on the foreground colour assigned to its, while the 0’s take on the
appropriate background (or backdrop) colour.
These colours are chosen by loading the correct byte of the pattern colour table with
the appropriate colour byte in a very similar way to that used to load VDP register 7 as
described in section 2.2 example 1.
The difference is that these colour control bytes are held in VRAM and do not need a
register type write to set them up, but would be manipulated using the VRAM I/0
routines described in section 1.