Product specifications

MTX VIDEO MEMORY MAPPING.
1 . 1
Terms used:
VRAM - Video ram.
VDP - Video Display Processor.
CPU - Central Processing Unit.
MBB - Most Significant Bit
LSB - Least Significant Bit
In using MSB and LSB, I have made the assumption that MSB is the left-most bit of
any byte, and LSB is the right-most bit. In my notation MSB = Bit 7. LSB - Bit 0.
MTX Vram memory architecture.
1.2
VRAM on the MTX is managed by the VDP chip, which contains its own auto-
incrementing address pointer.
The VRAM is independent from the Z30 processor ram as can be seen from diagram
1.0 above.
It can be seen that there is no apparent direct memory mapping to the video screen
which is held in VRAM, however the internal architecture of the VDP chip is such that
you can perform full memory mapping of various types through VDP ports 1 and 2.
Port 2 is used for address transfers.
Port 1 is used for data transfers
All addressing throughout VRAM is 14 bit. Address set ups require a two byte transfer
with two bits left over. To set up an addressing point the low byte of the address is
sent through port 2 first, then the high byte is sent of which bits 0 to 5 are part of the
address, the mode (described in section 1.3), being indicated by bits 6 and 7.
MODE.
1.3
The truth table below shows the bit set up required to direct the VD chip to either
select 'Write data to VRAM or 'Read data from VRAM'.
BIT 6 : 7
1 : 0 ‘Write data to VRAM’
0 : 0 ‘Read data from VRAM’

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