Datasheet

SigChg The host sets/resets the Signal Changed bit to enable/disable a state-change signal from
the status register. When set and the drive is configured for I/O, Chng controls pin 63 and
is called the Changed Status signal. This bit should be 0 (BVD1/STSCHG# held high
when configured for I/O) if no state change signal is desired.
IOis8 Must be set if the host can only perform 8-bit I/O accesses.
Audio Audio is not supported.
PwrDn Setting PwrDn places the drive in sleep mode. Host-initiated ATA task-file-register
commands can also invoke low-power modes.
Intr This bit represents the interrupt request’s internal state. Its value is available whether or
not interrupts are configured. It remains true until the initiating-interrupt request is
serviced.
Pin Replacement Register
The Pin Replacement register provides card status information that is otherwise provided on
memory-only interface pins 16, 33, 62, and 63. When written, bits 0-3 are masks for setting
corresponding bits 4-7.
7 6 5 4 3 2 1 0
CBvd CBvd Crdy/
bsy#
CWP RBvd RBvd Rrdy/
bsy#
RWP
CBvd1,2 Set when written, otherwise zero.
Crdy/bsy# Set when Rrdy/bsy# changes state or when written by the host.
CWP Zero unless set by the host.
RBvd1,2 Set unless cleared by the host.
Rrdy/bsy# Internal ready/busy# state when I/O mode uses RDY/BSY# pin for interrupt.
RWP Zero, since the flash drive has no write protect switch, unless set by the host.
Socket and Copy Register
The Socket and Copy register allows the drive to distinguish between similar drives at the same
address. The flash drive does not support this feature.
7 6 5 4 3 2 1 0
0 Copy Number Socket Number