User's Manual

MeiG hardware design guide
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Figure 4.40: WIFI_BT antenna interface simplified connection circuit
In the above figure, R301 defaults to 0R, and C301 and C302 do not paste by default.
5. PCB Layout
The performance of a product depends largely on the PCB trace. As mentioned above, if the PCB
layout is unreasonable, it may cause interference problems such as card loss. The way to solve these
interferences is often to redesign the PCB. If you can plan a good PCB layout in the early stage, the
PCB traces smoothly, saving a lot of time. Of course, it can also save a lot of costs. This chapter mainly
introduces some things that users should pay attention to during the PCB layout stage, minimizing
interference problems and shortening the user's development cycle.
The SLM756P module is an intelligent module with its own Android operating system. It includes
sensitive data lines such as high-speed USB and MIPI. It also has strict requirements on the length and
impedance of the signal line. If the high-speed signal processing is not good, it will cause serious EMI.
The problem, more serious will also affect the USB identification, LCM display, so the PCB design
requirements when using the SLM756P module is much higher than the previous 2G module, please
read this chapter carefully, reduce the subsequent hardware debugging cycle.
When using the SLM756P module, the user is required to use at least 4 layers of via design for the
impedance control and signal line shielding.
5.1. Module PIN distribution
Before the PCB layout, first understand the pin distribution of the module, and rationally layout the
relevant devices and interfaces according to the distribution defined by the pin. Please refer to Figure 2
to determine the distribution of the function feet of the module.
5.2. PCB layout principles
Several aspects of the main attention during the PCB layout phase: