User's Manual

MeiG hardware design guide
13
MIPI_DSI0_LANE2_P
126
I/O
MIPI_DSI0_LANE3_N
1
I/O
MIPI_DSI0_LANE3_P
2
I/O
PM8909_MPP2
4
O
Backlight PWM ontrol signal
LCD_TE
5
I/O
Frame synchronization signal
LDO6_1P8
7
O
1.8V power supply
LDO17_2P85
8
O
2.85V power supply
The LCD_ID of the module can use GPIO (only recognize high and low level) or ADC
(PM8909_MPP4). Please confirm the internal circuit of LCM. If the internal divider of LCM uses
resistor divider, please note that the voltage domain is 1.8V.
MIPI is a high-speed signal line. To avoid EMI interference, it is recommended to place a common-
mode inductor on the side close to the LCM.
Figure 4.16: Main LCD Interface Circuit
LCD needs a backlight circuit. The backlight driver circuit can refer to Figure 4.17. Adjusting the
backlight brightness can be realized by the module's PM8909_MPP2 (112PIN). The modulation mode
is PWM mode.