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0HL* KDUGZDUH GHVLJQ JXLGH Version History Date 2017-10 Version 1.00 Change description First edition Author Zheng Lei 2018-2 1.01 Modify the description of the 4.18.3 GPS antenna Zheng Lei 2018-8 1.02 Increase I2S information Zheng Lei 2018-9 1.03 Update image information Zheng Lei 2018-11 1.
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0HL* KDUGZDUH GHVLJQ JXLGH / (9'2 &'0$ [ * Don’t support dual CDMA sim-card 'LVSOD\ &DPHUD C Front and rearD 0DWUL[ +' S B 1280*720@60fps /&0 6L]H 8VHU GHILQHG ,QWHUIDFH 0,3, '6, ODQH ,QWHUIDFH PDLQ 0,3, &6, ODQHV IURQW 0,3, &6, ODQHV &DPHUD 3L[HO 0D[ FRONT 0 REAR 0 9LGHR GHFRGH 9LGHR HQFRGH Input Device 5HVHW Application interface S ISV +(9& + 03 'LY; 93 :9*$ ISV + S ISV + :9*$ ISV 93 03 KeyC Power on/off, Volume+, Volume
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20 0HL* KDUGZDUH GHVLJQ JXLGH $ $ A 2 # & G " % ! Signal VREG_L2_1P2 VREG_L6_1P8 VREG_L17_2P85 VREG_L11_SDC VREG_L8_2P9 VREG_L14_UIM1 VREG_L15_UIM2 Programmable Range V Default Voltage(V) Drive Current(mA) 1.8 1.8 2.85 2.95 2.9 1.8/3.3 1.8/3.3 1.75~3.337 1.75~3.337 1.75~3.
0HL* KDUGZDUH GHVLJQ JXLGH 21 9$ $ # $ $ $ < $ $ .< $ # $ $ $ $ 2: ): $ $ ! $ Figure 4.14: TX Connection Diagram Figure 4.
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23 0HL* KDUGZDUH GHVLJQ JXLGH MIPI_DSI0_LANE2_P 126 MIPI_DSI0_LANE3_N MIPI_DSI0_LANE3_P PM8909_MPP2 LCD_TE LDO6_1P8 LDO17_2P85 1 2 4 5 7 8 I/O I/O I/O O I/O O O Backlight PWM ontrol signal Frame synchronization signal 1.8V power supply 2.85V power supply The LCD_ID of the module can use GPIO (only recognize high and low level) or ADC (PM8909_MPP4). Please confirm the internal circuit of LCM. If the internal divider of LCM uses resistor divider, please note that the voltage domain is 1.8V.
0HL* KDUGZDUH GHVLJQ JXLGH 24 Figure 4.17: Backlight Drive Circuit Note: 1. The backlight circuit should select the chip according to the backlight circuit of LCD. Users should carefully read the LCD document and select the correct driver chip. The reference circuit provided in this document is a seriestype PWM dimming backlight driver circuit; if a series-type one-line dimming backlight driver circuit (such as KTD2801) is used due to design requirements, GPIO is required for control.
0HL* KDUGZDUH GHVLJQ JXLGH 25 Front camera interface Name Pin Input/Output Description .%./ .-/ 231/2 6) .@5 .%./ .-/ 231/% 6' .@5 .%./ .-/ B/2 69 .@5 D .%. $ .%./ .-/ B/% 41 .@5 D .%. $ -/ B 4- .@5 D $ -/A /2 46 .@5 D -/%>02 44 .@5 D " /.6 / 0 64 .@5 .6 /.6 / 67 .@5 .
0HL* KDUGZDUH GHVLJQ JXLGH 26 Figure 4.19: MIPI Camera Reference Circuit When designing the camera function, you need to pay attention to the position of the connector. There will be a small person in the specification of the camera to indicate the imaging direction. You need to ensure that the villain stands on the long side of the LCD. As shown in the two figures below.
27 0HL* KDUGZDUH GHVLJQ JXLGH Figure 4.20: Camera imaging diagram 5( # * &" # / & The module does not provide a resistive touch screen interface. If the user needs to use a resistive touch, an external dedicated chip is required. The module can provide an I2C interface.The reference circuit is as follows: Figure 4.
28 0HL* KDUGZDUH GHVLJQ JXLGH GPIO64_TP_RST_N 80 O Reset VREG_L17_2P85 112 O 2.8V Power Note: The interface definition of the capacitive touch can be adjusted by software, and the user can change the GPIO and I2C according to the design needs. 5(: # / & The module provides three analog audio inputs, MIC_IN1_P/M for the main microphone, MIC_IN2_P for the microphone, and MIC_IN3_P for the noise reduction microphone.
0HL* KDUGZDUH GHVLJQ JXLGH 29 Figure 4.21: Receiver Interface Circuit - 2 $ ! Below is the MEMS microphone interface circuit, which has more BIAS power supply than the electret MIC. Figure 4.22: Microphone Differential Interface Circuit - 3 . $ % The module integrates a stereo headphone jack. Users are advised to reserve ESD devices during the design phase to prevent ESD damage. The HS_DET pin of the module can be set as an interrupt.
30 0HL* KDUGZDUH GHVLJQ JXLGH 3 The standard of the headphone interface is the European standard OMPT. If you need to design the American standard CTIA interface, you need to swap the GND and MIC signals for the network. If you want to be compatible with both headset standards, you need an external dedicated chip, such as the TI-TS3A226AE. - $ / % The module integrates a Class-D audio amplifier with an output power of 0.85W and an output signal of SPKR_OUT_P / SPKR_OUT_M Figure 4.
31 0HL* KDUGZDUH GHVLJQ JXLGH 5(.; + 0 # / & The SLM756 supports a USB 2.0 High speed interface. It must control the 90 ohm differential impedance during Layout and control the external trace length according to the internal trace length of the module. The module supports OTG function at the same time (requires external circuit to provide external 5V power supply) The voltage input range during charging is as follows: Table 4.
0HL* KDUGZDUH GHVLJQ JXLGH 32 The recommended circuit diagram of USBOTG is as follows: Figure 4.27: USB-OTG Connection Diagram 5(.. " # / & * The USB_VBUS power supply is a USB power supply or an adapter power supply. It can be used as a USB plug-in detection and charge the battery through the internal PMU of the module. The power input voltage range is 4.35~6.3V, and the recommended value is 5V.
0HL* KDUGZDUH GHVLJQ JXLGH 33 Trickle charge: it is divided into 2 parts, trickle charge-A: charge current 90mA when the battery voltage is lower than 2.8V; trickle charge-B: charge current 450mA when the battery voltage is between 2.8V~3.2V; Constant current charging: When the battery voltage is between 3.2V and 4.2V, the constant current is charged, the charging current is 1.
0HL* KDUGZDUH GHVLJQ JXLGH 5(.2 34 # / & SLM756 supports SD card interface and supports up to 64GB The reference circuit is as follows: Figure 4.30: SD card interface circuit 5(.5 - 0 # / & The SLM756 module supports multiple hardware I2C bus interfaces. The default I2C pin definition functions are as follows: Table 4.
0HL* KDUGZDUH GHVLJQ JXLGH 35 5(. ' # # ' * # < = The SLM756 module provides two MPP function signals from the power management chip. MPP4 is the ADC input signal and MPP2 is the PWM signal. The ADC signal is 16-bit resolution, and its performance parameters are as follows: Table 4.12: ADC Performance Parameters Input Voltage Range Description Minimum Typical Maximum Measurement range can be selected by software programming 0.1 - 1.7 0.3 - 4.5 - 16 100 2.
0HL* KDUGZDUH GHVLJQ JXLGH 36 5(.9 # # / & The module provides four antenna interfaces: MAIN antenna, DRX antenna, GPS antenna and WiFi/BT antenna. In order to ensure that the user's products have good wireless performance, the antenna selected by the user should meet the requirement that the input impedance is 50 ohms in the working frequency band and the VSWR is less than 2. 3 & The module provides the MAIN antenna interface pin Pin1 RF_MAIN.
0HL* KDUGZDUH GHVLJQ JXLGH 37 Figure 4.34: MAIN Antenna Interface Simplified Connection Circuit In the above figure, R101 defaults to 0R, and C101 and C102 do not paste by default. 3 *)4 & The module provides the DRX antenna interface pin RF_DIV, and the antenna on the user's motherboard should be connected to the module's antenna pins using a 50-ohm characteristic microstrip or stripline.
0HL* KDUGZDUH GHVLJQ JXLGH 38 3 " 2' & The module provides the GNSS antenna pin RF_GPS. The antenna on the user's main board should be connected to the antenna pin of the module using a 50-ohm characteristic microstrip line or strip line. The LNA is integrated inside the module. To improve GNSS reception performance, customers can use external active antennas. The recommended circuit connections are as follows: 0RGXOH Figure 4.
0HL* KDUGZDUH GHVLJQ JXLGH 39 3 5 + 6(1 The module provides the WiFi/BT antenna pin RF_WIFI/BT. The antenna on the user's motherboard should be connected to the antenna pin of the module using a 50 ohm microstrip line or strip line. In order to facilitate antenna debugging and certification testing, an RF connector and antenna matching network should be added. The recommended circuit diagram is as follows: Figure 4.
0HL* KDUGZDUH GHVLJQ JXLGH 40 ' ( 7 The performance of a product depends largely on the PCB trace. As mentioned above, if the PCB layout is unreasonable, it may cause interference problems such as card loss. The way to solve these interferences is often to redesign the PCB. If you can plan a good PCB layout in the early stage, the PCB traces smoothly, saving a lot of time. Of course, it can also save a lot of costs.
0HL* KDUGZDUH GHVLJQ JXLGH ' 41 $$ 7 Power traces must consider not only VBAT, but also the return GND of the power supply. The trace of the positive electrode of VBAT must be short. To be thick, the trace must first pass through the large capacitor, Zener diode and then the power PIN of the module. There are multiple PAD exposed copper at the bottom of the module. It is necessary to ensure that the GND path of these exposed copper areas to the power supply is the shortest and most smooth.
0HL* KDUGZDUH GHVLJQ JXLGH 42 The common mode inductor should be close to the USB connector side. It is required to control the 90 ohm differential impedance with an error of ±10%. The differential line length error is controlled within 6mm. If the USB has a charging function, please note that the VBUS cable is as wide as possible. If there is a test point, try to avoid the split line and put the test point on the path of the trace. Table 5.1: Pin Signal Length(mm) 14 USB_DP 26.
43 0HL* KDUGZDUH GHVLJQ JXLGH # 8 ) 9 7 (. 3 ' # > % % The table below shows the absolute maximum values that the module can withstand. Exceeding these limits can cause permanent damage to the module. Table 6.2: Absolute Maximum Paramete r Minimum Typical Maximum Unit VBAT - - 6 V VBUS - - 10.5 V Peak current - - 3 A (- 6 1 % # The table below shows the operating temperature range of the module: Table 6.
44 0HL* KDUGZDUH GHVLJQ JXLGH (5 # ' # / & , # Table 6.4: Digital Interface Features (1.8V) Parameter Description Minimum Typical Maximum Unit VIH Input high level voltage 1.17 - - V VIL Input low level voltage - - 0.63 V 1.35 - - V - - 0.45 V Output high level voltage Output low level voltage VOH VOL ( ?8 " &# # & Table 6.
0HL* KDUGZDUH GHVLJQ JXLGH (9 45 # % # <80 @ 2(98= Table 6.8: Current consumption Param eter Descrip tion Condition Minimum Typical Maximu m Uni t VBAT voltage Voltage must be between the maximum and minimum values 3.4 3.8 4.
0HL* KDUGZDUH GHVLJQ JXLGH 46 (: ' &# # # & # &# The module is not specifically protected against electrostatic discharge. Therefore, users must pay attention to electrostatic protection when producing, assembling, and operating modules. (.; ' # , A &! 0 The table below lists the operating frequency bands of the module and complies with the 3GPP TS 05.05 technical specification. Table 6.
0HL* KDUGZDUH GHVLJQ JXLGH (.. , " 47 &# # & The following table lists the conducted RF output power of the module, in accordance with 3GPP TS 05.05 technical specification, 3GPP TS 134121-1 standard. Table 6.10: Conducted Output Power (.- ' &# & * # * #! The table below lists the conducted receive sensitivity of the module and is tested under static conditions. Table 6.11: Conducted Receive Sensitivity Frequency band 9.
48 0HL* KDUGZDUH GHVLJQ JXLGH Table 6.12: LTE Reference Sensitivity 3GPP Dual Antenna Requirements (QPSK) E-UTRA Frequency band number 1.
0HL* KDUGZDUH GHVLJQ JXLGH 49 (.2 6 , , / % & The table below lists the main RF performance under WIFI conduction. Table 6.13: Main RF performance parameters under WIFI conduction Transmission performance Transmit power (minimum rate) Transmit power (maximum rate) EVM (maximum rate) 802.11B 802.11G 802.11N 18 17 17 dBm 17 15 13 dBm 20% -27 -30 dB Receiving performance Receiving sensitivity 802.11B 802.11G 802.11N Minimum rate -92 -91 -90 dBm Maximum rate -89 -74.
0HL* KDUGZDUH GHVLJQ JXLGH 50 (. , / % & The table below lists the main RF performance under GNSS conduction. Table 6.15: Main RF performance parameters under GNSS conduction GNSS working frequency band: 1575.
0HL* KDUGZDUH GHVLJQ JXLGH 51 ' (.( 0 ## % 8 / " ' Figure 48: Module top and bottom views (-( & %% ' , & % # * Figure 49: Module recommended soldering furnace temperature curve (2( % #! # * #! < = The SLM756 module meets moisture sensitivity level 3.
0HL* KDUGZDUH GHVLJQ JXLGH 52 at least 6 months without unpacking. After unpacking, Table 22 lists the shelf life of the modules for different moisture sensitivity levels. Table 7.1: Humidity sensitivity level distinction Grade Factory environmenti +30h /60%RH 1 Indefinite quality in the environmenti +30h /85% RH Under conditions 2 1 Year 2a 4 Weeks 3 168 hours 4 72 hours 5 48 hours 5a 24 hours 6 Use it after forced baking.
0HL* KDUGZDUH GHVLJQ JXLGH 3 $$ ' $ 53 * ! Table 8.1: List of supported display models Vendor Drive IC DJN/%JKJOH ILI9881C ILI9881C HOLITECH/)FMJUBJ Table 8.2: List of supported camera models Vendor Drive IC GXKJ/)JHI JNBHF UFDIOPMPHZ SP5506 GXKJ/)JHI JNBHF UFDIOPMPHZ SP2509 Table 8.3: List of supported touch screen models Vendor Drive IC DJN/%JKJOH GT5688 HOLITECH/)FMJUBJ GT5688 GT970 DIXIAN/&NQFSPS 9JBO Table8.
0HL* KDUGZDUH GHVLJQ JXLGH 54 Vendor SGMICRO/4BJOU #POXF Model Specification SGM3785YTDP14G/TR FLASH LED Driver,1.5A Table 8.
0HL* KDUGZDUH GHVLJQ JXLGH 55 - &$$ : :(1( % > ' # Table 9.
0HL* KDUGZDUH GHVLJQ JXLGH 56 DTE Data Terminal Equipment (typically computer, terminal, printer) DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate ESD Electrostatic Discharge ETS European Telecommunication Standard FR Full Rate HR Half Rate IMEI International Mobile Equipment Identity Li-ion Lithium-Ion MO Mobile Originated MS Mobile Station (GSM engine), also referred to as TE MT Mobile Terminated PAP Password Authentication Protocol PBCCH Packet
0HL* KDUGZDUH GHVLJQ JXLGH 57 LD SIM last dialing phonebook (list of numbers most recently dialed) MC Mobile Equipment list of unanswered MT calls (missed calls) ON SIM (or ME) own numbers (MSISDNs) list RC Mobile Equipment list of received calls SM SIM phonebook NC Not connect :(2( '# ' > / &# Table 9.
0HL* KDUGZDUH GHVLJQ JXLGH 58 :(5( / #! 6 Pay attention to the following safety precautions when using or repairing any terminal or mobile phone that contains modules. The user should be informed of the following safety information on the terminal device. Otherwise, MeiG will not be responsible for any consequences caused by the user not following these warning actions. Table 9.
0HL* KDUGZDUH GHVLJQ JXLGH 59 FCC Certification Requirements. Any Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation.
0HL* KDUGZDUH GHVLJQ JXLGH 60 IC Statement IRSS-GEN "This device complies with Industry Canada’s licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device." or "Le présent appareil est conforme aux CNR d’Industrie Canada applicables aux appareils radio exempts de licence.
For IC , to meet RF exposure & ERP/ERIP, the maximum net gain of antennas allowed are 10dBi@WCDMA Band II/LTE Band 2 , 7dBi@ WCDMABand IV/ LTE Band 4 , 10.35dBi@ WCDMABand V/LTE Band 5 ,10.00dBi @LTE Band 7, 8.67dBi @ LTE Band 12/LTE Band 17,11.11dBi @ LTE Band 13. End Product Labeling: The outside of final products that contains this module device must display a label referring to the enclosed module.
