Specifications
-----------------,-----------------------------------------------------------------
Miscellaneous hardware notes
for
the
QUARK
------,
---------------------,--------.-----------------------------,
1.
The
QUARK
component computers use
some
high-speed
bipolar
integrated
circuits
in
order
to
achieve
thei
r high-performance
specifi
cations.
Some
of
these
parts
become
very
warm
in
the
course
of
operation.
This
is
perfectly
normal,
and
is
no
cause
for
alarm. However, adequate
ventilation
for
the
board
should
be
provided,
as
it
should
for
any
piece
of
electronic
e(JJipment.
The
QUARK
boards
are
tested
at
the
factory
for
proper
operation
at
an
ambient
temperature
of
over
50
degrees
Celsius,
a
temperature
that
exceeds
the
specifi
cations
of
standard
floppy-disk
drives.
The
total
power
dissipation
of
any
of
the
QUARK
boards
is
in
the
range
of
10
to
14
watts.
2.
Further
technical
information
regarding
the
expansion
of
the
QUARK
hardware
and
utilization
of
the
Peripheral
Expansion
Bus
is
available
in
the
form
of
"Quark
Application
Notes
- Q-Tips".
3.
The
red
light-emitting
diode
(LED)
on any
of
the
QUARKs
is
connected
to
the
1808's
~
output.
This
LED
will
be on when
the
180
is
running.
Executing
a
~
instruction,
for
instance,
will
extinguish
the
LED.
4.
If
a
QUARK
computer
is
unsucessful in
locating
track
0,
sector
1
of
the
system disk
drive
when
cold-booting,
it
wi
ll,
after
10
tries,
display
a diagonal
"staircase"
pattem
on
the
Video
Display
interface,
and
then
halt
(red
LED
off).
No
other
indication
of
the
error
will
be
given.
5.
The
Para
llel
Printer
STROBE
output (from
the
CA2
line
on
the
6522A
to
pin
C-13
on
the
connnector)
is
buffered
by
a medium-current
TTL
driver.
On
all
QUARK/100s
bearing
revision
05ROO
or
greater,
this
driver
is
a
non-inverting
buffer,
one
of
the
eight
such
buffers
in
the
74LS241.
On
all
earlier
QUARK/100s,
this
driver
is
an
inverting
buffer,
part
of
the
74LS240.
As
a consequence
of
this
change,
the
sense of
the
Parallel
Printer
STROBE
output
will
be
inverted
with
respect
to
its
former sense. This means,
among
other
things,
that
a
software
driver
intended
for
use with
the
inverter-driven
STROBE
line
wi
lL
not,
strictLy
speaking, be
compatible with
the
non-inverting
buffer.
However,
this
may
not
be
as
much
of
a problen
as
it
seems.
Most
printers
Latch the input data
on
the
rising
edge of
the
STROBE
line.
As
long
as
the
data
is
valid
on
its
data
inputs
for
at
least
the
mini
mum
set-l.4')
period
before
the
edge,
the
data
wi
II
be
accepted
by
the
printer.
Since
the
paraLlel
printer
driver
in
the
BIOS
of
the
distributed
CP/M
2.23
or
2.24 systems
generates
a
short
low-to-high-to-low
pulse
(as seen
on
the
CA2
pin)
after
it
sends
the
parallel
data
to
the
output
port,
the
printer
will
see
either
a
high-to-low-to-high
pulse
(if
an
inverter
drives
the
STROBE
line)
or
a low-to-high-to-low
pulse
(if
a
non-inverting
buffer
drives
the
STROBE
line).
If
the
inverter
is
driving
the
line,
then
the
printer
wi
Ll
latch
the
data
on
the
second
transition
of
the pulse.
If
the
non-inverting
buffer
drives
the
line,
it
wi
II
latch
the
data
on
the
first
transition.
Since
the
parallel
data
is
vaL
id
on
the
output
port
well before
either
transition
occurs,
and
because
the
both
transitions
of
the
pulse
occur
while
the
data
is
still
valid,
the
printer
will
have no
difficulty
acquiring
the
data,
regardless
of
the
polarity
of
the
signal.
Megatel
Computer
Technologies Toronto,
Canada
Page
H/W-24