Specifications
keyboard
to
the
QUARK
using the
1/0
lines
from
Port A of the
PIA
and
Ports A
and
8 of the
VIA.
For
such
a
keyboard
the user
would
include his
own
keyboard";'scanning
routine as part of the
CPIM
8IOS.
(This software
is
not provided
by
Megatel.)
The
1/0
address for reading or writing
either
Port A or
Data
Direction Register A of the
PIA
is
74hex.
The
addresses of the
PIA
Control Register A
is
7Shex.
Table Vlld in the
Appendix
gives the pin connections required for connecting a
keyboard
to
this
interface.
Full-Duplex
Serial
Interface
The
QUARK
provides
a
full-duplex
asynchronous
serial
data
port.
This
port
uses an
Asynchronous
Communications
Interface Adapter (part
number
68ASO)
and
includes line drivers
and
receivers for compatibi
lty
with
RS-232C
signal levels.
As
impL
ied
by
the term fuLl-duplex,
this
port
can
perform
bidirectional
simultaneous communication.
This port allows the
QUARK
to
be
connected
to
standard terminaLs
and
communications
peripherals,
such
as teLephone-Line
modems.
The
port
aLso
aLlows
a terminal
to
be
used
as the
console
1/0
devi ce.
ParalLel data written to the Transmit
Data
Register of the
ACIA
wi
Ll
be
transmitted
seriaLly
on
the
TxDATA
pin
of
the
QUARK
connector
(pin A-3).
Serial
data
received
on
the
RxDATA
pin
(pin C-2)
is
read from
the
Receive Data
Register.
The
1/0
address
of both
the
Transmit
and
the Receive Registers
is
79hex.
A
total
of four protocol lines are provided for the Port.
The
Clear-to-Send input line
(pin
C-4)
provides
direct
control of the transm i
tter
of the
ACIA.
The
Data
Set
Ready
input (pin
8-4) drives the
ACIA's
Data
Carrier Detect input,
which
provides
direct
controL of the receiver
of the
ACIA.
The
Request-to-Send output (pin 8-3)
is
controlled
by
the
RTS
bit
in the Control
register
of the
ACIA.
The
Data
Terminal
Ready
output (pin
C-3)
is
controlled
by
the
PB7
1/0
line
of
the
PIA.
The
PB7
Line should
be
configured
as
an
output
by
setting
bit
7
of
Data
Direction Register B in the
PIA
(1/0
address 76hex).
ALL
of the four protocol lines are
RS-
232C
compat
i b
lea
The
serial
communications speed (or
baud
rate) for the
serial
input
and
output data
is
controlled
by
one
or both of the
programmabLe
timers in the
VIA.
On
the
QUARK
the
PB7
Line
from
the
VIA
is
connected
directly
to the Transmit
CLock
input of the
ACIA.
When
Timer 1
is
operated in the free-run
mode
a square
wave
is
generated
on
the
PB7
output line. This square
wave
provides
the
basic
Transmit
CLock
frequency, which
is
then
divided
by
1,
16,
or
64,
according
to
the
settings
of
bit
0
and
bit
1 of the
ACIA
ControL
Register.
The
Receive
Clock
input of the
ACIA
can
be
connected
to
the Transmit
Clock
by
jumper J3.
Unless ordered otherwise,
this
jumper
is
instaLled
at
the factory.
With
J3 instalLed, the
Transmit
and
Receive
baud
rates
wiLL
be
identical,
both being generated
by
Timer 1 of the
VIA.
Timer 1 uses a 16-bit counter which,
in
the free-run
mode,
is
automatically re-loaded
from
the
16-bit
Timer
1 latch
each
time the counter reaches zero.
The
vaLue
in the
Latch
determines
the period of the square
wave
appearing
on
PB7.
The
period of
this
square
wave
is
given
by
(2N+3.5)
* t
E
,
where
tE
is
the period of the system E-clock
and
N
is
the
vaLue
in the
Ti
mer
1 Latch.
The
count-ddwn clock for
Timer
1
is
the system E-clock.
The
period of the E-clock
is
670.5
ns.
Table
II
in the
Appendix
gives the values for the
Ti
mer
1
Latch
requi red
to
generate
commonly-
used
baud
rates
on
this
serial
port.
Because
Timer 1
is
a
true
16-bit
timer,
it
is
able
to
produce the widest range
of
baud
rates.
If
"split"
baud
rates
on
the Full-duplex
Serial
Port -
where
the Transmit
and
Receive
baud
rates are independently generated - are required, then J3 should
be
removed
and
J4
installed.
The
installation
of J4 connects the
CB1
Line
from
the
VIA
to
the Receiver
Clock
input
on
the
ACIA.
Pulses
may
be
generated
on
the
CB1
line
when
the
Shift
Register
(SR)
of
the
VIA
is
operated in the "Shift out free-ruming
at
Timer
2 rate"
mode.
Values
for the Timer 2 low-
Megatel
Computer
Technologies Toronto,
Canada
Page
H/W-16