Specifications

SAMSEl EQU
PIAPA EQU
PIACRA EQU
PIAPB EQU
0000BH ;ADDRESS OF ROUTINE TO SET/CLEAR SAM BITS
074H
075H
076H
i
GRAPHICS:
SYNC:
LooP1 :
.
,
DI
IN
ANI
MOV
CALL
MOV
OUT
LXI
CALL
lOA
OUT
RET
.
,
PIAPB ;READ THE CURRENT STATE OF PIA PORT B
0BFH ;CLEAR BIT 6 (GRAHICS/ALPHA BIT)
B,A iSAVE THIS IN REGISTER B
SYNC iCALL ROUTINE TO SYNCHRONIZE WITH
i VERTICAL SYNC LINE
A,B iRESTORE VALUE TO SEND TO PIA PORT B
PIAPB ;RESTORE PIA PORT B WITH GRAPHICS BIT CLEARED
H,SAMV2S ;GEl SAM V2-SET ADDRESS
SAMSET ;SET V2 FOR GRAPHICS MODE
PIASAVE iGET FORMER VALUE FOR PIA CRA
PIACRA ;RESTORE PIA CRA
;RETURN FROM GRAPHIC-ENTRY ROUTINE
IN PIACRA iGET CURRENT PIA CRA
STA PIASAVE ;SAVE IT
MVI A,0C4H iVALUE FOR PIA CONTROL REGISTER A
OUT PIACRA ;DISABLE INTERRUPTS FROM CA2, SET IRGA2 ON
i HIGH-TO-LOW TRANSITION OF CA1 (VERT. SYNC)
IN PIAPA iREAD PIA PORT A TO CLEAR IRGA-1 AND -2 FLAGS
IN PIACRA iREAD PIA CRA
ANI 080H iEXAMINE BIT 7 (=IRGA1 FLAG)
JZ LOOP1 iLOOP UNTIL IRGA1 IS SET BY HIGH-TO-LOW
i TRANSITION OF VERTICAL SYNC LINE
iTHE FOLLOWING WILL CONFIGURE THE VIDEO DISPLAY MEMORY BETWEEN
iADDRESSES 2000H AND 7FFFH
iSEE TABLE VI IN THE APPENDIX FOR OTHER LOCATIONS FOR THE VIDEO
iDISPLAY MEMORY
.
,
LXI H,SAMF0C
;CLEAR
F0 BIT
CALL SAMSET
LXI H,SAMF1C
iCLEAR
F1 BIT
CALL
SAMSET
LXI
H,SAMF2C
;CLEAR
F2 BIT
CALL SAMSET
LXI H,SAMF3S
iSET F3 BIT
CALL
SAMSET
LXI H,SAMF5C
;CLEAR
F5 BIT
CALL SAMSET
LXI
H,SAMF6C
iCLEAR
F6 BIT
CALL
SAMSET
.
,
IN
PIAPA iREAD PIA PORT A TO CLEAR IRQA-1 AND -2 FLAGS
LooP3:
IN
PIACRA
iREAD PIA CRA
ANI 080H
iEXAMlNE BIT 7 (=IRQA1 FLAG)
JZ
LOOP3 iLOOP UNTIL IRQA11 IS SET BY HIGH-TO-LOW
i TRANSITION OF VERTICAL SYNC LINE
RET
PIASAVE:
DS
1 iONE BYTE FOR SAVING PIA CRA
Megatel Computer Technologies Toronto, Canada
Page H/W-13