Specifications
Video
Display
Memory
,---------------------
The
size
and
location
of
the
Video
Display
Memory
within the
Main
Memory
of the
QUARK
is
under software control through the
vaLues
stored in the control
register
of the
SAM,
as well as
by
the value in the
Z-BOB's
I
register.
The
size of the
Video
Display
memory
may
be
set
to
values between
1k
and
32k, although only certain
memory
sizes are appropriate, as
will
be
expLained below.
The
starting
address for the
Video
DispLay
memory
is
determined
by
the values
loaded into the
F6,
F5,
and
F3
to
F0
bits
of the
SAM
Control Register. (Bit
F4
is
not
used
in the determination of the
starting
address~
The
top address of the
Video
Display
Memory
is
determined
by
the
mode
(Alphanumeric
or Graphics)
and
by
the values of the
SAM
Video
Display
Counter
bits
corresponding
to
F3
and
F~
-
The
Video
Display Interface reads
96
consecutive bytes
from
the
Video
Display
Memory
for
each
raster
scan line displayed
on
the
CRT.
In
Alphanumeric
mode,
these
96
bytes are the
last
96
of
each
half-page
(128
bytes) within the
Video
Display
Memory.
The
first
32
bytes of each
half-page are not read
by
the
Video
Display Interface in Alphanumeric
mode.
In Graphics
mode,
the
96
bytes scanned for
each
line displayed are contiguous within the
Video
Display
Memory.
Thus
there are
no
unscanned
memory
areas within the
Video
Display
Memory
when
operating in Graphics
mode.
In both
di
sp
lay
modes,
the
second
through si xteenth of the
96
bytes, plus
one
more
from
the displayed
80
bytes, are read during the horizontal retrace interval between succesive scan
lines
on
the
CRT
monitor.
The
Video
output
is
blanked during
this
interval,
so
the contents of
these bytes
will
not
directly
cause
any
visible
output
on
the
CRT.
The
last
eighty bytes
contain
either
the
ASCII
codes
to
be
translated
into character data
on
the
CRT,
or the graphic
information
to
be
displayed as pixels.
In the Alphanumeric
mode,
the
same
96-byte block
is
read eight times for
each
character
row
displayed.
It
is
necessary to
do
this
because
each
character
row
is
bui
lt
~
from
eight
raster
scan
lines,
each
line adding
one
horizontal "slice" of the character patterns.
The
ASCII
code
for
each
of the eighty characters in the
row
must
be read eight times while the
Scan
Line Counter counts
from
0
to
7.
The
Graphics
mode
operates
in
a
similar
fashion
to
the Alphanumeric
mode,
except
that
each
of the
sets
of
96
bytes
is
read only
once
for
each
raster
scan line displayed, rather than
eight times
as
in
the
Alphanumeric
Mode.
In the
Monochrome
Video
Display
Interface,
the data
in the
last
80
of the
96
bytes
is
sent di rect ly
to
the
Video
Shift
Register, bypassing the
Character Generator.
Thus
the pattern of
bits
in
each
of the
80
bytes determines the pattern
of pixels displayed
on
each
scan line of the
CRT.
Since
80
bytes of eight
bits
each
are read
for each
line,
a
total
of
640
pixels
can
be displayed horizontally.
The
most-significant
bit
of
each
byte
(bit
7)
is
the
first
bit
shifted
out
by
the
Video
Shift
Register,
and
thus appears
on
the
CRT
as the left-most pixel of
each
group
of eight.
The
time requi
red
to
read the
96
bytes
from
the
Video
Display
Memory
determines the
Horizontal
Sync
pulse period
and
frequency.
Four
Z-80B
T-states are required for
each
byte
read.
Thus
the Horizontal
Sync
frequency
is
15.540kHz
(64.368
us),
and
on
the
50Hz
version
it
is
16.1145kHz
(61.939
us).
In the Graphics
mode,
the top address of the
Video
Display
Memory
is
equal
to
the output
from
the
Video
Counter at the time
when
the
Video
Counter
bits
corresponding
to
F3
and
F4
reach
QJ
and
1,
respectively. In Alphanumeric
mode,
the top address
is
such
that
the
Video
Counter
bit
corresponding
to
F4
reaches zero.
Thus
in
Alphanumeric
mode
the top address of the
Video
Display
memory
is
the address of the
first
16k
boundary
following the
starting
address
minus
one.
In Graphics
mode
the top address
is
the address of the second
16k
boundary
following the
starting
address
minus
one.
Megatel
Computer
Technologies Toronto,
Canada
Page
H/W-10