Specifications
Pnogramming
the
SAM
Registers
---------,
The
Synchrorous
Address
Multiplexer
(SAM)
is
an
essential part of the
CPU,
and
the
Video
Display Interface.
The
Control Registers
of
the
SAM
are
initia
l ized
by
the Bootstrap
PROM
after
a system
reset.
It
may
be
necessary at
some
time to
change
some
of the values in the Registers of the
SAM.
To
allow the user to
do
this,
a special routine is automatically loaded into
Page
Zero
of
of the
Main
Memory.
This routine is called the
SAM
Loader
Access
Routine, since
it
provides
access
to
the
SAM
Register
Loader
routine
in
the Bootstrap
PROM.
To
set
or clear
any
of the
SAM
registers,
the address corresponding
to
the
register
is
loaded
into
the
HL
register,
and
then
the
SAM
Register
Loader Access
routine
at
location
000Bhex
is caLled.
For
exampLe,
the
folLowing
sequence
wi
II
clear
register
F1:
LXI
CALL
H,0FF88H
00QJBH
iLOAD
ADDRESS
FOR
F1-CLEAR
iCALL
SAM
LOADER
ACCESS
ROUTINE
Table V in the
Appendix
Lists the addresses to
be
used
for clearing or
setting
each
of the
registers
in
the
SAM,
as
weLL
as
indicating the functions of
some
of the
register
for the
QUARK.
Note
that only
some
of the registers are ever likeLy to
be
changed.
Even
though
there
are
ro actual
restri
ctions
on
the settings for
any
of the
registers,
only a particuLar
set
of
combinations is useful
on
the
QUARK.
Table
VI
indicates the useful set
of
vaLues
for the F-registers. Registers
F0,
F1,
F2,
F3,
F5,
and
F6
are
used
in
determining the
starting
address of the
Video
Display
Memory.
The
location of the
Video
Display
Memory
which
results
from
each
of the combinations
is
also
shown
in Table
V.
If
it
is
necessary
to
use
the
area of
Main
Memory
occupied
by
the
SAM
Loader Access
Routine, then
the
routine
can
be
copied
to
the corresponding
location
in
any
2k
block
of
memory.
OnLy
the section of the
Access
Routine
between
locations
000BH
and
0017H
incLusive
need
be
cop
i
ed.
For
instance,
if
the area
from
000BH
to
0017H
is
copied into the area
from
F00BH
to
F017H,
then the folLowing
exampLe
wilL
have
the
same
effect
as
the previous example:
LXI
CALL
H,0FF88H
F00BH
QUARK
Interrupt
system
iLOAD
ADDRESS
FOR
F1-CLEAR
iCALL
SAM
LOADER
ACCESS
ROUT
On
the
QUARK
both
of the
two
Z8{)3
interrupt inputs
'NJ8IT
and
lNT
are used.
The
maskable
interrupt input
m
is
wired-ORed
to the interrupt request outputs
from
the
VIA,
the
PIA,
and
the
ACIA.
The
non-maskabLe
interrupt
input
Nlrr
is
connected
to
the
1793 Floppy-disk
Controller's
Data
Request
output
(DRQ)
through
an
inverter.
Interrupt requests
from
each
of the
VIA,
PIA,
and
ACIA
can
be
individually enabled or
disabled
by
writing to the appropriate control registers in these devices.
The
Verti
caL
Sync
Line
is connected to the
CA1
input of the
PIA.
Since the frequency
on
this
line is rormally
60Hz,
the
CA1
input
can
be
used
to generate a real-time clock interrupt
to the
CPlL
Note
that
if
the si
ze
of the
Video
Display
Memory
is
changed
from
the "standard"
sizes
for
ALphanumeric
and
Graphics
Modes,
the
Vertical
Sync
frequency
wi
II
change
proportionately.
Thus,
if
the VerticaL
Sync
Frequency
is
changed,
any
software
which
relies
on
this
interrupt
as
a
ti
me
base
shouLd
take
this
into account.
~
The
Interrupt
Request
line
INTRQ
from
the
1793
Floppy-disk Controller
is
connected
to
the
~
input
on
the
VIA.
Thi
s interrupt output is set at the completion of
any
command
to
the
G~\'1\
.
Megatel
Computer
Technologies Toronto,
Canada
Page
H/W-8