User`s manual

6.4.2 High-Drive Digital I/O Data and Control Registers
The 24 High-Drive DIO lines are grouped as three byte-wide I/O ports. Port assignment and functionality
is identical to that of the industry standard 8255 Peripheral Interface operating in Mode 0. Please see the
Intel or Harris data sheets for more information. Drive capability of each line is 15 mA in the TTL HI
state and 24 mA in the TTL LOA state.
HDIO PORT A DATA
BADR3 + 4
PORT A can be configured as an 8-bit I/O channel.
READ/WRITE
D0D1D2D3D4D5D6D7
01324567
HDIO PORT B DATA
BADR3 + 5
PORT B can be configured as an 8-bit I/O channel. Its functionality is identical to that of PORT A.
READ/WRITE
D0D1D2D3D4D5D6D7
01324567
HDIO PORT C DATA
BADR3 + 6
PORT C can be configured as an 8-bit port of either input or output, or it can be split into two
independent 4-bit ports of input or output. When split into two 4-bit I/O ports,
D[3:0]
make up the lower nibble,
D[7:4]
comprise the upper nibble. Although it can be split, every
write to Port C is a byte operation. Unwanted information must be ANDed out during reads
and writes must be ORd with current value of the other 4-bit port.
READ/WRITE
D0D1D2D3D4D5D6D7
01324567
HDIO CONTROL REGISTER
BADR3 + 7
The HDIO Control register is used configure Ports A, B, and C as inputs or outputs. Operation is
identical to that of the 8255 in Mode 0.
WRITE
D0D10D3D4001
01324567
Note: Bits 3,5-7 are hardwired to the values shown (Mode 0). Actual writes to these bit positions are
"don't care."
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