User`s manual

9 SPECIFICATIONS
Typical for 25°C unless otherwise specified.
Power Consumption
820mA typical, 1.4A max+5V quiescent
Analog Input Section
+55/-40V fault protected via input muxAbsolute maximum input voltage
10 MOhms minInput impedance
±3nA maxInput leakage current
-100dB typ, -80dB minCMRR @ 60Hz
±10V minCommon Mode Range
100KHzThroughput
10µs maxA/D conversion time
FIFO Half Full
End of Acquisition
End of Burst
FIFO not Empty
End of ConversionInterrupt Sources
(software programmable)
Active high level or active low level, programmable through
PLX9052
Interrupt polarity
Programmable through PLX9052Interrupt enable
INTA# - mapped to IRQn via PCI BIOS at boot-timeInterrupt
Software polled
Interrupt
From 1024 sample FIFO via interrupt w/ REPINSW
Data Transfer
Software selectable option, burst interval = 10uSBurst Mode
TTL output (pin 26), jumper enabled.
Logic 0 = Hold, Logic 1 = Sample
Compatible with CIO-SSH16
Simultaneous Sample and Hold Trigger
External gate (pin 25),
High or Low level, software selectable.
A/D Gate
(only available when internal pacing selected,
software enable/disable)
External edge trigger (pin 25),
Positive or negative edge, software selectable.
A/D Trigger
(only available when internal pacing selected,
software enable/disable)
Software polled
External source (pin25),
Positive or negative edge, software selectable.
Internal counter - 82C54.
Positive or negative edge, jumper selectable.
A/D Pacing (software programmable)
±10V, ±5V, ±2.5V, ±1.25V
0 to 10V, 0 to 5V, 0 to 2.5V, 0 to 1.25V
Input ranges
•
Gain is software selectable
Unipolar/Bipolar polarity is switch selectable
16 single-ended / 8 differential, switch selectableNumber of channels
16 bitsResolution
LTC1605CSWA/D converter type
37