User`s manual

MA3, MA2, MA1, and MA0 is a binary number between 0 and 15 indicating the MUX channel currently

selected and is valid only when EOC = 0. The channel MUX increments shortly after EOC = 1 so may

be in a state of transition when EOC = 1.

ADC CONVERSION STATUS REGISTER

BADR3 + 3

READ ONLY

00OVERRUNFHFFNEEOAEOBEOC

01234567

EOC = 1, the A/D converter is busy.

EOC = 0, it is free.

EOC is in both BADR3+2 and BADR3+3 for convenience in software programming.

EOB = 1, An ADC Burst has been completed

EOB = 0, An ADC Burst is in progress or has not started

EOA = 1, the residual # of samples have been written to the FIFO

EOA = 0, the residual # of samples have not been written to the FIFO

EOA is cleared by writing a 0 to the INT bit in BADR3+4. See below.

EOA is in both BADR3+3 and BADR3+4 for convenience in software programming

FNE = 1, FIFO memory contains at least on sample.

FNE = 0, FIFO memory contains no samples

FHF = 1, FIFO memory contains at least 512 samples.

FHF = 0, FIFO memory contains less than 512 samples

OVERRUN = 1, FIFO memory has overrun

OVERRUN = 0, FIFO memory has not overrun

OVERRUN is in both BADR3+3 and BADR3+4 for convenience in software programming

INTERRUPT STATUS AND CONTROL

BADR3 + 4

READ/WRITE

INTSEL0INTSEL1EOA_INT_SELEOAOVERRUNXINTINTE

01234567

INTSEL[1:0] are used to select the source of the interrupt. With the exception of EOA, end of

acquisition, you can only select one interrupt source.

FIFO half full/EOA11

EOB, End of Burst01

FIFO not empty10

EOC, End of Conversion00

INTERRUPT SOURCEINTSEL

INTSEL