User`s manual

1.1.3 Analog Outputs
The PCI-DAS1602/12 provides two channels of high-speed 12-bit analog output. The analog outputs are
updated via an on-board FIFO and REP OUTSW commands and provide a 250 kHz maximum update
rate. Software selectable output ranges of 0 to 10V, 0 to 5V, ±10V and ±5V are provided, and channels
may be set at different ranges. The D/A outputs provide rated accuracy to ±5 mA, are short circuit
protected (25 mA limit) and are cleared to 0 volts on power up or reset.
1.1.4 Parallel Digital I/O
The PCI-DAS1602/12 provide 24 bits of parallel, digital I/O in the form of two 8-bit ports, and two 4-bit
ports. This digital capability is based on an on-board 82C55 PIA chip, which allows each of the ports to be
set independently as input or output. On power up or reset, the ports default to the input state (high
impedance).
1.1.5 Counter/Timer I/O
The PCI-DAS1602/12 provides one 16-bit down counter (one third of an 82C54 chip). The counter
provides clock, gate and output connections. The Counter clock may also be connected to the on-board 10
MHz crystal oscillator or may be left uncommitted for user input.
Installed in any PCI bus compatible personal computer the PCI-DAS1602/12 turns your personal computer
into a high-speed data acquisition and control station suitable for laboratory data collection, instrumenta-
tion, production test, or industrial monitoring.
This product is supported by our Universal Library programming library. As an owner, you are entitled to
the latest revision of the manual and software. Just call with your current revision numbers handy, and
request an update be sent to you.
Port A
Port B
Port C
Control
PA (7:0)
PB (7:0)
PC (7:0)
Digital I/O
8
PCI
CONTROLLER
BADR1
BADR2
BADR3
BADR4
Interrupt
Boot
EEPROM
ADC
Pacer
Control
Scan
&
Burst
Logic
HS
DAC
Control
Trigger
Control
DAC Pacer
Control
Decode/Status
Int
Ctl
Bus
Timing
PCI-DAS1602/12
Block Diagram
EXT
PCR
10MHz
INT
XINT
Gains = 1, 2, 4, 8
XTRIG
CONTROLLER
FPGA
Analog
Trigger
Logic
TRIG_HI
ANALOG
TRIGGER
TRIG_LO
ADC
Pacer
CTR 2
CTR 1
Sample
Counter
CTR0
Control
Gain and Offset Autocal
INT
12-Bit, 330KHz
Mux
&
Gain
Analog In
16 CH S.E.
8 CH DIFF.
1024 x 12
FIFO
Gain and Offset Autocal
DAC
Data
Control
VDAC 0
VDAC 1
1024 x 12
FIFO
DAC
Pacer
CTR2
CTR1
ADC
Index
Counter
User
CTR 0
Control
Time Base
GATE
CLK
OUT
INT
XTRIG
Start EOC
DAC0
DAC1
12-Bi t, 250 KHz
12-Bi t, 250 KHz
INT
INT
10MHz
LOCAL BUS
PCI BUS (5V, 32-BIT, 33MHZ)
Burst/Scan
Burst/Scan
2