User`s manual

Table of Contents
37
8.0 SPECIFICATIONS
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367.6.2 DAC FIFO CLEAR REGISTER
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357.6.1 DAC DATA REGISTER
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347.6 BADR4
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317.5.2 DIGITAL I/O DATA AND CONTROL REGISTERS
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307.5.1 ADC PACER CLOCK DATA AND CONTROL REGISTERS
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307.5 BADR3
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297.4.2 ADC FIFO CLEAR REGISTER
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297.4.1 ADC DATA REGISTER
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297.4 BADR2
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277.3.5 DAC CONTROL/STATUS REGISTER
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267.3.4 CALIBRATION REGISTER
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237.3.3 TRIGGER CONTROL/STATUS REGISTER
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227.3.2 ADC CHANNEL MUX AND CONTROL REGISTER
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197.3.1 INTERRUPT / ADC FIFO REGISTER
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197.3 BADR1
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197.2 BADR0
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197.1 REGISTER OVERVIEW
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19
7.0 REGISTER DESCRIPTION
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176.1 CALIBRATION CONFIGURATION
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17
6.0 SELF-CALIBRATION
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165.2 PACKAGED APPLICATIONS PROGRAMS
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165.1 PROGRAMMING LANGUAGES
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16
5.0 PROGRAMMING & APPLICATIONS
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154.2.7 Isolated Grounds / Differential Inputs
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154.2.6 Isolated Grounds / Single-Ended Inputs
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144.2.5 Common Mode Voltage > +/-10V
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134.2.4 Common Mode Voltage < +/-10V/Differential Inputs
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134.2.3 Common Mode Voltage < +/-10V/Single-Ended Inputs
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134.2.2 Common Ground / Differential Inputs
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124.2.1 Common Ground / Single-Ended Inputs
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124.2 WIRING CONFIGURATIONS
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94.1.2 System Grounds and Isolation
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74.1.1 Single-Ended and Differential Inputs
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74.1 ANALOG INPUTS
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7
4.0 ANALOG CONNECTIONS
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43.2 CONNECTING SIGNALS TO THE PCI-DAS1602/12
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33.1 CONNECTOR PIN DIAGRAM
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3
3.0 HARDWARE CONNECTIONS
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32.2 HARDWARE INSTALLATION
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32.1 SOFTWARE INSTALLATION
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3
2.0 INSTALLATION
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21.1.5 Counter/Timer I/O
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21.1.4 Parallel Digital I/O
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21.1.3 Analog Outputs
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11.1.2 Burst Mode
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11.1.1 Analog Inputs
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11.1 FUNCTIONAL DESCRIPTION
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1
1.0 INTRODUCTION
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