Specifications

LEON-G100/G200 - System Integration Manual
GSM.G1-HW-09002-C Preliminary System description
Page 38 of 75
If the I2S interface is used in PCM mode, digital path parameters can be configured and saved as the normal
analog paths, using appropriate path index as described in the u-blox AT commands manual [2]. Analog gain
parameters of microphone and speakers are unused when digital path is selected.
Any external signal connected to the digital audio interface must be set low or tri-stated when the module
is in power down mode to avoid an increase of module power consumption. If the external signals
connected to the digital audio interface cannot be set low or tri-stated, insert a multi channel digital switch
(e.g. Texas Instruments SN74CB3Q16244, TS5A3159, or TS5A63157) between the two-circuit connections
and set to high impedance when the module is in power down mode.
For debug purposes, include a test point at each I2S pin also if the digital audio interface is not used.
1.9.2.1 PCM mode
In PCM mode I2S_TX and I2S_RX are respectively parallel to the analog front end I2S_RX and I2S_TX as
internal connections to the voice processing system (see Figure 24), so resources available for analog path can be
shared:
Digital filters and digital gains are available in both uplink and downlink direction. Configure using AT
commands
Ringer tone and service tone are mixed on the TX path when active (downlink)
The HF algorithm acts on I2S path
Main features of the I2S interface in PCM mode:
I2S runs in PCM - short alignment mode (configurable with AT commands)
Module functions as I2S master (I2S_CLK and I2S_WA signals generated by the module)
I2S_WA signal always runs at 8 kHz
I2S_WA toggles high for 1 or 2 CLK cycles of synchronism (configurable), then toggles low for 16 CLK
cycles of sample width. Frame length can be 1 + 16 = 17 bits or 2 + 16 = 18 bits
I2S_CLK frequency depends on frame length. Can be 17 x 8 kHz = 136 kHz or 18 x 8 kHz = 144 kHz
I2S_TX, I2S_RX data are 16 bit words with 8 kHz sampling rate, mono. Data are in 2’s complement
notation. MSB is transmitted first
When I2S_WA toggles high, first synchronism bit is always low. Second synchronism bit (present only in
case of 2 bit long I2S_WA configuration) is MSB of the transmitted word (MSB is transmitted twice in this
case)
I2S_TX changes on I2S_CLK rising edge, I2S_RX changes on I2S_CLK falling edge
1.9.2.2 Normal I2S mode
Normal I2S supports:
16 bits word
mono interface
8 kHz frequency
Main features of I2S interface in Normal I2S mode:
I2S_WA signal always runs at 8 KHz and the channel can be either high or low;
I2S_TX data 16 bit words with 32 bit frame and 2, dual mono (the word can be written on 2 channels).
Data are in 2’s complement notation. MSB is transmitted first. The MSB is first transmitted; the bits change
on I2S_CLK rising or falling edge (configurable);
I2S_RX data are read on the I2S_CLK edge opposite to I2S_TX writing edge;
I2S_CLK frequency depends by the number of bits and number of channels so is 16 x 2 x 8 KHz = 256 KHz.
The modes are configurable through a specific AT command (refer to u-blox AT commands manual [2]) and the
following parameters can be set: