Specifications

PCIe/104 and PCI/104-Express Specification Revision 3.0 February 17, 2015 Page 25
2.9. Device Connector Break-out Examples
These drawings are not to scale and do not show controlled impedance lines. They are intended to show the general
connections and lane shifting on a device for various PCIe/104 devices that can be stacked above or below the CPU.
All power, ground, and unused signals have the top and bottom connectors connected together. The examples show
the device on the top of the board; however that is not a requirement.
2.9.1 Universal PCI Express x1 Device Layout Example
Figure 2-8 below shows an example of routing a Universal x1 PCI Express link from the PCIe/104 connector to a
Signal Switch. This device can be stacked either above or below the CPU and implements lane shifting.
Figure 2-8 Example breakout routing of a Universal PCI Express x1 link with shifting.
2.9.2 Universal PCI Express x4 Device Layout Example
Figure 2-9 below shows an example of routing a Universal x4 PCI Express link from the PCIe/104 connector to a
Signal Switch. This device can be stacked either above or below the CPU and implements lane shifting.
Figure 2-9 Example breakout routing a Universal PCI Express x4 link with lane shifting.