Specifications

PCIe/104 and PCI/104-Express Specification Revision 3.0 February 17, 2015 Page 2
REVISION HISTORY
March 21, 2008 Version 1.0
• Initial release
March 27, 2009 Version 1.1
• Add USB and over current signal to pin out, inserted description in 1.4.4, modified shift example
to include USB
• Section 2.4 corrected that even numbered pins are located towards the inside of the board and odd
numbered pins are located towards the edge of the board
• PEx16_ENA changed to PEG_ENA# in section 2.4.1.2 and 2.4.3
• Figure 2.3 Moved Host to bottom in this figure and added USB
• Figure 6-14 Top two boards are PCI/104-Express
February 10, 2011 Version 2.0
• Added Type 2 connector version
• Added 22mm connector option
• Removed Figure 6 4: Mating of Top Half and Bottom Half of Connector A because this non-
dimensioned sketch provided no useful information
• Editorial changes:
o Changed signal names PWRGD to PWRGOOD, CPU_DIR to DIR, and 5V_Always to
+5V_SB for consistency
o Corrected USB0 and USB1 in Automatic Link Shifting Examples for Host and Various
Devices
o Corrected text in Appendix B and C related to PCI/104-Express Expansion Zone
o Redrew Example breakout routing of connector bank 1 PCI Express x1 links with
shifting
o Changed PCIe to PCI Express when discussing the PCI Express specification.
o Cleaned up drawings in Figure 1-1
o Swapped order of section 1.3 and 1.4 and edited text
o Fixed missing references.
o Added signal switches suggestions for SATA and USB 3.0
March 21, 2011 Version 2.01
• Provided SATA definitions that were omitted in previous version.
February 18, 2013 Version 2.10
• Corrected Consortium name in all references
• Expanded introduction to PCI Express to include Gen 1, 2, and 3.
• Added PCI Express Gen 2 recommendations.
o Added devices and updated signal switch table.
o Updated layout recommendations section to include PCIe Gen 2 & 3.
o Added Gen 2 & 3 to via and trace length table.
o Removed microstrip and stripline examples.
•
Added PCI Express x4, x8, and x16 layout examples.
• Added SATA and USB 3.0 capacitor info and layout examples.
• Changed SDVO to Alternate Function