Specifications

PCIe/104 and PCI/104-Express Specification Revision 3.0 February 17, 2015 Page 17
If the Device is stacked below the module, then the DIR line would be set to +5V and the SELECT line of the
multiplexers would allow Link 3 to connect to the PCI device. Links 0, 1, and 2 are then allowed to shift and pass over so
that Link 2 is in the Link 3 position, Link 1 is in the Link 2 position, and Link 0 is in the Link 1 position. A right-most
link is now available for the next Device card to be stacked below the first Device.
All Devices can be built using the same methodology as a single configuration. The Links used will always be the left
most links or the rights most links depending if the Device gets stacked above or below the Host. Stack-UP or Stack-
DOWN Link Shifting
2.4.4 Stack-UP or Stack-DOWN Link Shifting
Within the different connector types and configurations, Connector A contains differential Link Groups. These include
x1/x4/x8 PCI Express, USB 2.0, USB 3.0, and SATA. Within each group are individual point-to-point links which must
be automatically shifted if one or more links out of that group are used on a Device. The x16 PCI Express, LPC, SMB,
power, and control signals do not require Link shifting.
Link shifting is utilized so that Devices can be built uniformly and consistently while using dedicated point-to-point
connections. Without link shifting, Devices would have to be made with a specific link identified. This would then
require each Device to have multiple configurations, one for each link position. Link shifting at the PCB level allows
each Device to have only one universal configuration.
In cases where less than the maximum number of features is provided by the Host (for example 2 PCIe x1 links instead of
4), the designer must place them in the positions that enable them to be used by add-on modules. If the host provides for
top side expansion, the features should be positioned on the connector starting with the lowest numbered feature. If the
host provides for bottom side expansion, the features should be positioned starting with the highest numbered feature.
Note: If the host has the same expansion bus links connected to both the top and bottom connectors, devices using these
links should not be stacked both above and below the Host at the same time, in order to avoid signal integrity degradation
due to signal path stubs.