Specifications
PCIe/104 and PCI/104-Express Specification Revision 3.0 February 17, 2015 Page 4
6. SATA 1 at 1.5 Gigabits/second
7. USB 2.0 at 480 Mbits/second
• Follow the guidelines for up and down stacking in Table 1-2 Type 1 & Type 2 Combinations below.
For example, if you have a host with a Type 1 stacking down and a Type 2 stacking up with one SATA 2, one USB 3.0,
one PCI Express x1 Gen 2, two PCI Express x1 Gen 1, and one PCI Express x16 Gen 2 peripherals your stack could be
configured as:
• SATA peripheral
• USB 3.0 peripheral
• Host (Type 1 going down and Type 2 going up)
• PCI Express x16 Gen 2 peripheral
• PCI Express x1 Gen 2 peripheral
• PCI Express x1 Gen 1 peripheral
• PCI Express x1 Gen 1 peripheral
For details on host and peripheral configuration see section 4, PCIe/104 Type 1 and Type 2 Stacking.
1.8. Stack Up, Stack Down, and Both
If the host CPU has the same type connector on top and bottom of the board and the signals are connected together,
boards can be stacked either up or down using the direction signal DIR to indicate to the peripheral board where the host
is located. In this case, care must be taken not to stack boards in both directions because signal stubs will be created
which may adversely affect the bus signals.
Surface mounted connectors permit the top and bottom connectors to be separate busses. If the host CPU is built with
separate busses on top and bottom there will not be stubs when stacking cards both up and down at the same time. This
specification supports connected or separate bus options as long as board configuration rules are followed. Table 1-2
shows the maximum number of links for all the possible combinations.
Table 1-2 Type 1 & Type 2 Combinations
PCIe/104
Top and Bottom Connectors
Connected Separate Connected Separate Connected Separate
Peripheral Board Stacking
Either up or down Both up and down Either up or down Both up and down Both up and down
x1 PCIe Links 4 8 4 8 8
USB 2.0 2 4 2 4 4
SMB 1 1 1 1 1
x4 PCIe Links 2 4 2 4 4
x8 PCIe Links 2 4 None None 2
x16 PCIe Links 1 2 None None 1
SATA
None None
24 2
USB 3.0
None None
24 2
LPC
None None
11 1
Type 1 Type 2 Type 1 & 2 Combo
Not Allowed
1.9. Bus and Signal Group Descriptions
1.9.1 PCI Express Expansion Bus
PCI Express is a high performance, general purpose I/O interconnect defined for a wide variety of future computing and
communication platforms. Key PCI attributes, such as its usage model, load-store architecture, and software interfaces,
are maintained, whereas its parallel bus implementation is replaced by a highly scalable, fully serial interface. PCI
Express takes advantage of recent advances in point-to-point interconnects, Switch-based technology, and packet-protocol
to deliver new levels of performance and features. Power Management, Quality of Service (QoS), Hot-Plug/Hot-Swap
support, Data Integrity, and Error Handling are among some of the advanced features supported by PCI Express. PCI
Express has three signaling rates.
• Generation 1, Gen 1, is 2.5 Gigabits/second/Lane/direction of raw bandwidth
• Generation 2, Gen 2, is 5.0 Gigabits/second/Lane/direction of raw bandwidth
• Generation 3, Gen 3, is 8.0 Gigabits/second/Lane/direction of raw bandwidth