Datasheet

+5V, RS-232 Transceivers
with 0.1µF External Capacitors
6
MAX200–MAX209/MAX211/MAX213
RS-232 Receivers
The receivers convert RS-232 signals to CMOS logic
output levels. Receiver outputs are inverting, maintain-
ing compatibility with driver outputs. The guaranteed
receiver input thresholds of +0.8V and +2.4V are signifi-
cantly tighter than the Q3.0V threshold required by the
EIA/TIA-232E specification. This allows receiver inputs
to respond to TTL/CMOS logic levels and improves noise
margin for RS-232 levels.
The MAX200–MAX209/MAX211/MAX213 guaranteed
+0.8V threshold (+0.6V in shutdown for the MAX213)
ensures that receivers shorted to ground have a logic 1
output. Also, the 5kI input resistance to ground ensures
that a receiver with its input left open also has a logic 1
output.
Receiver inputs have approximately +0.5V hysteresis.
This provides clean output transitions, even with slow
rise and fall time input signals with moderate amounts of
noise and ringing. In shutdown, the MAX213 receivers
R4 and R5 have no hysteresis.
Figure 3. Transition Slew-Rate Test Circuit
Figure 4. Dual Charge-Pump Diagram
+5V
0V (+5V)
0V (+5V)
0.1FF
0.1FF
0.1FF
C1+
C1-
C2+
C2-
400kI
3kI
2500pF
5kI
V
CC
V+
V-
T
IN
+5V
T1 T0 T5
R1 T0 R5
T
OUT
R
IN
0.1FF
R
OUT
SHDN (SHDN)
EN (EN)
MAX200-MAX209
MAX211
MAX213
+5V
0V (+5V)
MAXIMUM SLEW-RATE
TEST CIRCUIT
MINIMUM SLEW-RATE
TEST CIRCUIT
NOTE: ( ) ARE FOR MAX213.
0V (+5V)
0.1FF
0.1FF
0.1FF
C1+
C1-
C2+
C2-
400kI
7kI
50pF
5kI
V
CC
V+
V-
T
IN
+5V
T1 T0 T5
R1 T0 R5
T
OUT
R
IN
0.1FF
R
OUT
SHDN (SHDN)
EN (EN)
MAX200-MAX209
MAX211
MAX213
0.1FF 0.1FF
V+ V+
S5S1 S2C1+ S6C2+
I
L
+
C3
C2
C4
GND
R
L
-
V-
S7
S8
GND
V
CC
I
L
-
R
L
+
C2-
C1
V
CC
200kHz
S3 S4
C1-
GND