Datasheet
Table Of Contents
- FEATURES
- DETAILED DESCRIPTION
- ORDERING INFORMATION
- Figure 1. Block Diagram
- PIN DESCRIPTION
- 80C32 COMPATIBILITY
- Figure 2. Comparative Timing of the DS80C320/DS80C323 and 80C32
- HIGH-SPEED OPERATION
- INSTRUCTION SET SUMMARY
- Table 1. Instruction Set Summary
- SPEED ADVANTAGE SUMMARY
- MEMORY ACCESS
- Figure 3. Typical Memory Connection
- STRETCH MEMORY CYCLE
- Table 2. Data Memory Cycle Stretch Values
- DUAL DATA POINTER
- 64-Byte Block Move without Dual Data Pointer
- 64-Byte Block Move with Dual Data Pointer
- PERIPHERAL OVERVIEW
- SERIAL PORTS
- TIMER-RATE CONTROL
- POWER-FAIL RESET
- POWER-FAIL INTERRUPT
- WATCHDOG TIMER
- Table 3. Watchdog Timeout Values
- INTERRUPTS
- Table 4. Interrupt Priority
- POWER MANAGEMENT
- IDLE MODE ENHANCEMENTS
- STOP MODE ENHANCEMENTS
- Figure 4. Ring Oscillator Startup
- TIMED ACCESS PROTECTION
- SPECIAL-FUNCTION REGISTERS
- Table 5. Special-Function Register Locations
- ELECTRICAL SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- DC ELECTRICAL CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 DC ELECTRICAL CHARACTERISTICS
- TYPICAL ICC vs. FREQUENCY
- AC CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C320
- DC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS (continued)
- AC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C323
- EXTERNAL CLOCK CHARACTERISTICS
- SERIAL PORT MODE 0 TIMING CHARACTERISTICS
- EXPLANATION OF AC SYMBOLS
- POWER-CYCLE TIMING CHARACTERISTICS
- NOTES FOR POWER CYCLE TIMING CHARACTERISTICS
- PROGRAM MEMORY READ CYCLE
- DATA MEMORY READ CYCLE
- DATA MEMORY WRITE CYCLE
- DATA MEMORY WRITE WITH STRETCH = 1
- DATA MEMORY WRITE WITH STRETCH = 2
- EXTERNAL CLOCK DRIVE
- SERIAL PORT MODE 0 TIMING
- POWER-CYCLE TIMING
- DATA SHEET REVISION SUMMARY

DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
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MOVX CHARACTERISTICS—DS80C320
VARIABLE CLOCK
PARAMETER SYMBOL
MIN MAX
UNITS STRETCH
2t
CLCL
-11 t
MCS
=0
RD Pulse Width
t
RLRH
t
MCS
-11
ns
t
MCS
>0
2t
CLCL
-11 t
MCS
=0
WR Pulse Width
t
WLWH
t
MCS
-11
ns
t
MCS
>0
2t
CLCL
-25 t
MCS
=0
RD Low to Valid Data In
t
RLDV
t
MCS
-25
ns
t
MCS
>0
Data Hold After Read t
RHDX
0 ns
t
CLCL
-5 t
MCS
=0
Data Float After Read t
RHDZ
2t
CLCL
-5
ns
t
MCS
>0
2.5t
CLCL
-27 t
MCS
=0
ALE Low to Valid Data In t
LLDV
1.5t
CLCL
-28+t
MCS
ns
t
MCS
>0
3t
CLCL
-27 t
MCS
=0
Port 0 Address to Valid Data
In
t
AVDV1
2t
CLCL
-31+t
MCS
ns
t
MCS
>0
3.5t
CLCL
-32 t
MCS
=0
Port 2 Address to Valid Data
In
t
AVDV2
2.5t
CLCL
-34+t
MCS
ns
t
MCS
>0
0.5t
CLCL
-8 0.5t
CLCL
+6 t
MCS
=0
ALE Low to RD or
WR
Low
t
LLWL
1.5t
CLCL
-7 1.5t
CLCL
+8
ns
t
MCS
>0
t
CLCL
-11 t
MCS
=0
Port 0 Address Valid to RD or
WR Low
t
AVWL1
2t
CLCL
-10
ns
t
MCS
>0
1.5t
CLCL
-9 t
MCS
=0
Port 2 Address Valid to RD or
WR Low
t
AVWL2
2.5t
CLCL
-13
ns
t
MCS
>0
-9 t
MCS
=0
Data Valid to WR Transition
t
QVWX
t
CLCL
-10
ns
t
MCS
>0
t
CLCL
-12 t
MCS
=0
Data Hold After Write t
WHQX
2t
CLCL
-7
ns
t
MCS
>0
RD Low to Address Float
t
RLAZ
(Note 5) ns
0 10 t
MCS
=0
RD or
WR
High to ALE
High
t
WHLH
t
CLCL
-5 t
CLCL
+11
ns
t
MCS
>0
Note: t
MCS
is a time period related to the Stretch memory cycle selection. The following table shows the value of
t
MCS
for each Stretch selection.
M2 M1 M0 MOVX CYCLES t
MCS
0 0 0 2 machine cycles 0
0 0 1 3 machine cycles (default) 4 t
CLCL
0 1 0 4 machine cycles 8 t
CLCL
0 1 1 5 machine cycles 12 t
CLCL
1 0 0 6 machine cycles 16 t
CLCL
1 0 1 7 machine cycles 20 t
CLCL
1 1 0 8 machine cycles 24 t
CLCL
1 1 1 9 machine cycles 28 t
CLCL