Datasheet
Table Of Contents
- FEATURES
- DETAILED DESCRIPTION
- ORDERING INFORMATION
- Figure 1. Block Diagram
- PIN DESCRIPTION
- 80C32 COMPATIBILITY
- Figure 2. Comparative Timing of the DS80C320/DS80C323 and 80C32
- HIGH-SPEED OPERATION
- INSTRUCTION SET SUMMARY
- Table 1. Instruction Set Summary
- SPEED ADVANTAGE SUMMARY
- MEMORY ACCESS
- Figure 3. Typical Memory Connection
- STRETCH MEMORY CYCLE
- Table 2. Data Memory Cycle Stretch Values
- DUAL DATA POINTER
- 64-Byte Block Move without Dual Data Pointer
- 64-Byte Block Move with Dual Data Pointer
- PERIPHERAL OVERVIEW
- SERIAL PORTS
- TIMER-RATE CONTROL
- POWER-FAIL RESET
- POWER-FAIL INTERRUPT
- WATCHDOG TIMER
- Table 3. Watchdog Timeout Values
- INTERRUPTS
- Table 4. Interrupt Priority
- POWER MANAGEMENT
- IDLE MODE ENHANCEMENTS
- STOP MODE ENHANCEMENTS
- Figure 4. Ring Oscillator Startup
- TIMED ACCESS PROTECTION
- SPECIAL-FUNCTION REGISTERS
- Table 5. Special-Function Register Locations
- ELECTRICAL SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- DC ELECTRICAL CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 DC ELECTRICAL CHARACTERISTICS
- TYPICAL ICC vs. FREQUENCY
- AC CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C320
- DC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS (continued)
- AC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C323
- EXTERNAL CLOCK CHARACTERISTICS
- SERIAL PORT MODE 0 TIMING CHARACTERISTICS
- EXPLANATION OF AC SYMBOLS
- POWER-CYCLE TIMING CHARACTERISTICS
- NOTES FOR POWER CYCLE TIMING CHARACTERISTICS
- PROGRAM MEMORY READ CYCLE
- DATA MEMORY READ CYCLE
- DATA MEMORY WRITE CYCLE
- DATA MEMORY WRITE WITH STRETCH = 1
- DATA MEMORY WRITE WITH STRETCH = 2
- EXTERNAL CLOCK DRIVE
- SERIAL PORT MODE 0 TIMING
- POWER-CYCLE TIMING
- DATA SHEET REVISION SUMMARY
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
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immediately preceding the setting of the Stop bit to guarantee a correct power-on delay when exiting Stop
mode.
The second feature allows an additional power saving option. This is the ability to start instantly when
exiting Stop mode. It is accomplished using an internal ring oscillator that can be used when exiting Stop
mode in response to an interrupt. The benefit of the ring oscillator is as follows.
Using Stop mode turns off the crystal oscillator and all internal clocks to save power. This requires that
the oscillator be restarted when exiting Stop mode. Actual start-up time is crystal dependent, but is
normally at least 4ms. A common recommendation is 10ms. In an application that will wakeup, perform a
short operation, then return to sleep, the crystal startup can be longer than the real transaction. However,
the ring oscillator will start instantly. The user can perform a simple operation and return to sleep before
the crystal has even stabilized. If the ring is used to start and the processor remains running, hardware will
automatically switch to the crystal once a power-on reset interval (65,536 clocks) has expired. This value
is used to guarantee stability even though power is not being cycled.
If the user returns to Stop mode prior to switching of crystal, then all clocks will be turned off again. The
ring oscillator runs at approximately 3MHz (1.5MHz at 3V) but will not be a precision value. No real-
time precision operations (including serial communication) should be conducted during this ring period.
Figure 4 shows how the operation would compare when using the ring, and when starting up normally.
The default state is to come out of Stop mode without using the ring oscillator.
This function is controlled using the RGSL - Ring Select bit at EXIF.1 (EXIF to 91h). When EXIF.1 is
set, the ring oscillator will be used to come out of Stop mode quickly. As mentioned above, the processor
will automatically switch from the ring (if enabled) to the crystal after a delay of 65,536 crystal clocks.
For a 3.57MHz crystal, this is approximately 18ms. The processor sets a flag called RGMD - Ring Mode
to tell software that the ring is being used. This bit at EXIF.2 will be logic 1 when the ring is in use. No
serial communication or precision timing should be attempted while this bit is set, since the operating
frequency is not precise.