Datasheet
Table Of Contents
- FEATURES
- DETAILED DESCRIPTION
- ORDERING INFORMATION
- Figure 1. Block Diagram
- PIN DESCRIPTION
- 80C32 COMPATIBILITY
- Figure 2. Comparative Timing of the DS80C320/DS80C323 and 80C32
- HIGH-SPEED OPERATION
- INSTRUCTION SET SUMMARY
- Table 1. Instruction Set Summary
- SPEED ADVANTAGE SUMMARY
- MEMORY ACCESS
- Figure 3. Typical Memory Connection
- STRETCH MEMORY CYCLE
- Table 2. Data Memory Cycle Stretch Values
- DUAL DATA POINTER
- 64-Byte Block Move without Dual Data Pointer
- 64-Byte Block Move with Dual Data Pointer
- PERIPHERAL OVERVIEW
- SERIAL PORTS
- TIMER-RATE CONTROL
- POWER-FAIL RESET
- POWER-FAIL INTERRUPT
- WATCHDOG TIMER
- Table 3. Watchdog Timeout Values
- INTERRUPTS
- Table 4. Interrupt Priority
- POWER MANAGEMENT
- IDLE MODE ENHANCEMENTS
- STOP MODE ENHANCEMENTS
- Figure 4. Ring Oscillator Startup
- TIMED ACCESS PROTECTION
- SPECIAL-FUNCTION REGISTERS
- Table 5. Special-Function Register Locations
- ELECTRICAL SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- DC ELECTRICAL CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 DC ELECTRICAL CHARACTERISTICS
- TYPICAL ICC vs. FREQUENCY
- AC CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C320
- DC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS (continued)
- AC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C323
- EXTERNAL CLOCK CHARACTERISTICS
- SERIAL PORT MODE 0 TIMING CHARACTERISTICS
- EXPLANATION OF AC SYMBOLS
- POWER-CYCLE TIMING CHARACTERISTICS
- NOTES FOR POWER CYCLE TIMING CHARACTERISTICS
- PROGRAM MEMORY READ CYCLE
- DATA MEMORY READ CYCLE
- DATA MEMORY WRITE CYCLE
- DATA MEMORY WRITE WITH STRETCH = 1
- DATA MEMORY WRITE WITH STRETCH = 2
- EXTERNAL CLOCK DRIVE
- SERIAL PORT MODE 0 TIMING
- POWER-CYCLE TIMING
- DATA SHEET REVISION SUMMARY
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
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Table 1 shows the speed for each class of instruction. Note that many of the instructions have multiple op
codes. There are 255 op codes for 111 instructions. Of the 255 op codes, 159 are three times faster than
the original 80C32. While a system that emphasizes those instructions will see the most improvement, the
large total number that receive a 3 to 1 improvement assure a dramatic speed increase for any system. The
speed improvement summary is provided below.
SPEED ADVANTAGE SUMMARY
#OP CODES
SPEED
IMPROVEMENT
159 3.0 x
51 1.5 x
43 2.0 x
2 2.4 x
255 Average: 2.5
MEMORY ACCESS
The DS80C320/DS80C323 do not contain on-chip ROM and 256 bytes of scratchpad RAM. Off-chip
memory is accessed using the multiplexed address/data bus on P0 and the MSB address on P2. Figure 3
shows a typical memory connection. Timing diagrams are provided in the Electrical Specifications
section. Program memory (ROM) is accessed at a fixed rate determined by the crystal frequency and the
actual instructions. As previously mentioned, an instruction cycle requires 4 clocks. Data memory (RAM)
is accessed according to a variable-speed MOVX instruction as described below.
Figure 3. Typical Memory Connection