Datasheet
Table Of Contents
- FEATURES
- DETAILED DESCRIPTION
- ORDERING INFORMATION
- Figure 1. Block Diagram
- PIN DESCRIPTION
- 80C32 COMPATIBILITY
- Figure 2. Comparative Timing of the DS80C320/DS80C323 and 80C32
- HIGH-SPEED OPERATION
- INSTRUCTION SET SUMMARY
- Table 1. Instruction Set Summary
- SPEED ADVANTAGE SUMMARY
- MEMORY ACCESS
- Figure 3. Typical Memory Connection
- STRETCH MEMORY CYCLE
- Table 2. Data Memory Cycle Stretch Values
- DUAL DATA POINTER
- 64-Byte Block Move without Dual Data Pointer
- 64-Byte Block Move with Dual Data Pointer
- PERIPHERAL OVERVIEW
- SERIAL PORTS
- TIMER-RATE CONTROL
- POWER-FAIL RESET
- POWER-FAIL INTERRUPT
- WATCHDOG TIMER
- Table 3. Watchdog Timeout Values
- INTERRUPTS
- Table 4. Interrupt Priority
- POWER MANAGEMENT
- IDLE MODE ENHANCEMENTS
- STOP MODE ENHANCEMENTS
- Figure 4. Ring Oscillator Startup
- TIMED ACCESS PROTECTION
- SPECIAL-FUNCTION REGISTERS
- Table 5. Special-Function Register Locations
- ELECTRICAL SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- DC ELECTRICAL CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 DC ELECTRICAL CHARACTERISTICS
- TYPICAL ICC vs. FREQUENCY
- AC CHARACTERISTICS—DS80C320
- NOTES FOR DS80C320 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C320
- DC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS
- NOTES FOR DS80C323 DC ELECTRICAL CHARACTERISTICS (continued)
- AC ELECTRICAL CHARACTERISTICS—DS80C323
- NOTES FOR DS80C323 AC ELECTRICAL CHARACTERISTICS
- MOVX CHARACTERISTICS—DS80C323
- EXTERNAL CLOCK CHARACTERISTICS
- SERIAL PORT MODE 0 TIMING CHARACTERISTICS
- EXPLANATION OF AC SYMBOLS
- POWER-CYCLE TIMING CHARACTERISTICS
- NOTES FOR POWER CYCLE TIMING CHARACTERISTICS
- PROGRAM MEMORY READ CYCLE
- DATA MEMORY READ CYCLE
- DATA MEMORY WRITE CYCLE
- DATA MEMORY WRITE WITH STRETCH = 1
- DATA MEMORY WRITE WITH STRETCH = 2
- EXTERNAL CLOCK DRIVE
- SERIAL PORT MODE 0 TIMING
- POWER-CYCLE TIMING
- DATA SHEET REVISION SUMMARY
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
10 of 38
Table 1. Instruction Set Summary (continued)
INSTRUCTION BYTE
OSCILLATOR
CYCLES
INSTRUCTION BYTE
OSCILLATOR
CYCLES
DATA TRANSFER INSTRUCTIONS
MOV A, Rn 1 4
MOVC A,
@A+DPTR
1 12
MOV A, direct 2 8 MOVC A, @A+PC 1 12
MOV A, @Ri 1 4 MOVX A, @Ri 1 8–36*
MOV A, #data 2 8 MOVX A, @DPTR 1 8–36*
MOV Rn, A 1 4 MOVX @Ri, A 1 8–36*
MOV Rn, direct 2 8 MOVX @DPTR, A 1 8–36*
MOV Rn, #data 2 8 PUSH direct 2 8
MOV direct, A 2 8 POP direct 2 8
MOV direct, Rn 2 8 XCH A, Rn 1 4
MOV direct1, direct2 3 12 XCH A, direct 2 8
MOV direct, @Ri 2 8 XCH A, @Ri 1 4
MOV direct, #data 3 12 XCHD A, @Ri 1 4
MOV @Ri, A 1 4
MOV @Ri, direct 2 8
MOV @Ri, #data 2 8
MOV DPTR, #data 16 3 12
BIT MANIPULATION INSTRUCTIONS
CLR C 1 4 ANL C, bit 2 8
CLR bit 2 8
ANL C,
bit
2 8
SETB C 1 4 ORL C, bit 2 8
SETB bit 2 8
ORL C,
bit
2 8
CPL C 1 4 MOV C, bit 2 8
CPL bit 2 8 MOV bit, C 2 8
PROGRAM BRANCHING INSTRUCTIONS
ACALL addr 11 2 12 CJNE A, direct, rel 3 16
LCALL addr 16 3 16 CJNE A, #data, rel 3 16
RET 1 16 CJNE Rn, #data, rel 3 16
RETI 1 16 CJNE Ri, #data, rel 3 16
AJMP addr 11 2 12 NOP 1 4
LJMP addr 16 3 16 JC rel 2 12
SJMP rel 2 12 JNC rel 2 12
JMP @A+DPTR 1 12 JB bit, rel 3 16
JZ rel 2 12 JNB bit, rel 3 16
JNZ rel 2 12 JBC bit, rel 3 16
DJNZ Rn, rel 2 12
DJNZ direct, rel 3 16
*User selectable.