Datasheet

DS2431
1024-Bit, 1-Wire EEPROM
______________________________________________________________________________________ 17
Read/Write Time Slots
Data communication with the DS2431 takes place in
time slots that carry a single bit each. Write time slots
transport data from bus master to slave. Read time
slots transfer data from slave to master. Figure 11 illus-
trates the definitions of the write and read time slots.
All communication begins with the master pulling the
data line low. As the voltage on the 1-Wire line falls
below the threshold V
TL
, the DS2431 starts its internal
timing generator that determines when the data line is
sampled during a write time slot and how long data is
valid during a read time slot.
Master-to-Slave
For a write-one time slot, the voltage on the data line
must have crossed the V
TH
threshold before the write-
one low time t
W1LMAX
is expired. For a write-zero time
slot, the voltage on the data line must stay below the
V
TH
threshold until the write-zero low time t
W0LMIN
is
expired. For the most reliable communication, the volt-
age on the data line should not exceed V
ILMAX
during
the entire t
W0L
or t
W1L
window. After the V
TH
threshold
has been crossed, the DS2431 needs a recovery time
t
REC
before it is ready for the next time slot.
Slave-to-Master
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below V
TL
until the read low time t
RL
is expired. During the t
RL
window, when responding with a 0, the DS2431 starts
pulling the data line low; its internal timing generator
determines when this pulldown ends and the voltage
starts rising again. When responding with a 1, the
DS2431 does not hold the data line low at all, and the
voltage starts rising as soon as t
RL
is over.
The sum of t
RL
+ δ (rise time) on one side and the inter-
nal timing generator of the DS2431 on the other side
define the master sampling window (t
MSRMIN
to
t
MSRMAX
), in which the master must perform a read
from the data line. For the most reliable communication,
t
RL
should be as short as permissible, and the master
should read close to but no later than t
MSRMAX
. After
reading from the data line, the master must wait until
t
SLOT
is expired. This guarantees sufficient recovery
time t
REC
for the DS2431 to get ready for the next time
slot. Note that t
REC
specified herein applies only to a
single DS2431 attached to a 1-Wire line. For multide-
vice configurations, t
REC
must be extended to accom-
modate the additional 1-Wire device input capacitance.
Alternatively, an interface that performs active pullup
during the 1-Wire recovery time such as the DS2482-
x00 or DS2480B 1-Wire line drivers can be used.
RESISTOR MASTER DS2431
t
RSTL
t
PDL
t
RSTH
t
PDH
MASTER Tx "RESET PULSE" MASTER Rx "PRESENCE PULSE"
V
PUP
V
IHMASTER
V
TH
V
TL
V
ILMAX
0V
ε
t
F
t
REC
t
MSP
Figure 10. Initialization Procedure: Reset and Presence Pulse