Datasheet

Slave-to-Master
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below V
ILMAX
until the read low time t
RL
is expired. During the t
RL
window, when responding with a 0, the DS1990A starts
pulling the data line low; its internal timing generator
determines when this pulldown ends and the voltage
starts rising again. When responding with a 1, the
DS1990A does not hold the data line low at all, and the
voltage starts rising as soon as t
RL
is over.
The sum of t
RL
+ δ (rise time) on one side and the inter-
nal timing generator of the DS1990A on the other side
define the master sampling window (t
MSRMIN
to
t
MSRMAX
) in which the master must perform a read from
the data line. For most reliable communication, t
RL
should be as short as permissible and the master should
read close to but no later than t
MSRMAX
. After reading
from the data line, the master must wait until t
SLOT
is
expired. This guarantees sufficient recovery time t
REC
for the DS1990A to get ready for the next time slot.
DS1990A
Serial Number i
Button
_______________________________________________________________________________________ 9
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
F3 iButton IB#3NB
21-0252
F5 iButton IB#5NB
21-0266
Package Information
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