Datasheet

DG417/DG418/DG419
Improved, SPST/SPDT Analog Switches
8 _______________________________________________________________________________________
50%
V
OUT1
V
OUT2
0.9 x V
OUT
+3V
0V
0V
LOGIC
INPUT
SWITCH
OUTPUT 1
SWITCH
OUTPUT 2
V
OUT
0.9 x V
OUT
t
D
t
D
LOGIC
INPUT
V-
-15V
R
L
300Ω
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
S2
D
IN1, IN2
VL
S1
V
OUT
V+
DG419
+5V
+15V
C
L
35pF
+10V
Figure 5. Charge Injection
V
GEN
GND
D
C
L
10nF
V
OUT
-15V
V-
V+
VL
V
OUT
IN
OFF
ON
OFF
∆V
OUT
Q = ∆V
OUT
x C
L
S
+5V
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IN
= +3V
DG417
DG418
DG419
+15V
Figure 4. DG419 Break-Before-Make Interval
______________________________________Test Circuits/Timing Diagrams (continued)