Owner's manual

6-15
Figures 6-9 and 6-10 show data memory interconnect examples for page mode 1 and page mode 2.
ALE
CK
74F373
LATCH
MSB ADDRESS
DATA BUS
LSB ADDRESS
PORT 0
(
8
)
(
8
)
64kB X 8
SRAM
(
8
)
PORT 2
RD
(P3.7)
WR
(
P3.6
)
OE
WE
CE
DS89C4x0
Figure 6-10. Data Memory Interface (Page Mode 2)
ALE
CK
74F373
LATCH
MSB ADDRESS
LSB ADDRESS
DATA BUS
PORT 0
(
8
)
(
8
)
64kB X 8
SRAM
(
8
)
CE
PORT 2
RD
(P3.7)
WR
(
P3.6
)
OE
WE
DS89C4x0
Figure 6-9. Data Memory Interconnect (Page Mode 1)
Ultra-High-Speed Flash
Microcontroller User’s Guide
Maxim Integrated