Datasheet

MX7575/MX7576
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs
_______________________________________________________________________________________ 3
Note 1: Offset Error is measured with respect to an ideal first-code transition that occurs at 1/2LSB.
Note 2: Sample tested at +25°C to ensure compliance.
Note 3: Accuracy may degrade at conversion times other than those specified.
Note 4: Power-supply current is measured when MX7575/MX7576 are inactive, i.e.:
For MX7575 CS = RD = BUSY = high;
For MX7576 CS = RD = BUSY = MODE = high.
Using recommended
clock components:
R
CLK
= 100k,
C
CLK
= 100pF;
T
A
= +25°C
V
OUT
= 0V to V
DD
, D0–D7
V
IN
= 0V
V
IN
= V
DD
4.75V < V
DD
< 5.25V LSB±1/4Power-Supply Rejection
mW15Power Dissipation
mA
7
I
DD
Supply Current
36
V5V
DD
Supply Voltage
µs
10 30
Conversion Time with
Internal Clock
515
µs
10
Conversion Time with
External Clock
5
pF10
Floating State Output
Capacitance (Note 2)
µA
±10
Floating State Leakage Current
V2.4V
INH
Input High Voltage
V0.8V
INL
Input Low Voltage
±1
V4.0V
OH
Output High Voltage
V0.4V
OL
Output Low Voltage
700
I
INL
µA
800
Input Low Current
700
I
INH
µA
800
Input High Current
UNITSMIN TYP MAXSYMBOLPARAMETER
MX757_S/T
MX757_J/A/K/B
±5% for specified performance
MX7576
MX7575
MX7576: f
CLK
= 2MHz
T
A
= +25°C
I
SOURCE
= 40µA
MX7575: f
CLK
= 4MHz
I
SINK
= 1.6mA
MX757_J/A/K/B
MX757_S/T
MX757_J/A/K/B
D0–D7
MX757_S/T
T
A
= T
MIN
to T
MAX
CONDITIONS
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +5V; V
REF
= 1.23V; AGND = DGND = 0V; f
CLK
= 4MHz external for MX7575; f
CLK
= 2MHz external for MX7576;
T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
CLOCK
LOGIC OUTPUTS (D0–D7, )
CONVERSION TIME (Note 3)
POWER REQUIREMENTS (Note 4)