Datasheet

Figure 2a. The Campbell firmware flowchart for Nexys 3 Platform.
The firmware accepts commands, writes status, and is capable of downloading blocks of sampled data to a
standard terminal program via a virtual COM port. The complete source code is provided to speed up customer
development. Code documentation can be found in the corresponding firmware platform files.
Detailed Description of Firmware for ZedBoard Platform
The Campbell firmware design is also developed and tested for the ZedBoard kit and targets an ARM
®
Cortex
®
-A9 processor placed inside a Xilinx Zynq system-on-chip (SoC).
An AXI MAX11100 custom IP core is created for this reference design to optimize the sampling rate and SPI
timing stability.
The firmware is a working example of how to interface to the hardware, collect samples, and save them to
memory. The simple process flow is shown in Figure 2b. The firmware is written in C using the Xilinx SDK tool,
which is based on the Eclipse open source standard. Custom Campbell-specific design functions were created
utilizing the AXI MAX11100 custom IP core. The SPI clock frequency is set to 4.54MHz when a 189.4ksps
sampling rate is selected. The SPI clock frequency is set to 2.5MHz for all other sampling rate.
Page 4 of 10