Datasheet

MAX9939
SPI Programmable-Gain Amplifier
with Input V
OS
Trim and Output Op Amp
3
Maxim Integrated
Note 1: All devices are 100% production tested at T
A
= +25°C. Temperature limits are guaranteed by design.
Note 2: The input offset voltage includes the effects of mismatches in the internal V
CC
/2 resistor dividers.
Note 3: For gain of 0.25V/V, the input common-mode range is -1V to V
CC
- 2V.
Note 4: The input current of a CMOS device is too low to be accurately measured on an ATE and is typically on the order of 1pA.
Note 5: Parts are functional with f
SCLK
= 10MHz.
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 5V, V
GND
= 0V, V
INA+
= V
INA-
, Gain = 10V/V, R
OUTA
= R
OUTB
= 1kΩ to V
CC
/2, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Unity-Gain Bandwidth UGBW 2.2 MHz
Slew Rate SR 6.4 V/µs
Settling Time t
S
To 1%, 2V output step 0.86 µs
Input-Voltage Noise Density V
N
36 nV/√Hz
Distortion THD f = 1kHz, V
OUTA
= 2.5V
P-P
, gain = -1V/V 90 dB
Max Capacitive Load C
L
(
MAX
)
1nF
Output Swing V
OH
, V
OL
Voltage output high = V
CC
- V
OUTB
,
voltage output low = V
OUTB
- V
GND
25 60 mV
POWER SUPPLY
Supply Voltage Range V
CC
Guaranteed by PSRR 2.9 5.5 V
Power-Supply Rejection Ratio PSRR
1kΩ between OUTA and INB, 1kΩ between
OUTB and INB, measured differentially
between OUTA and OUTB
60 80 dB
Supply Current I
CC
OUTA and OUTB unloaded 3.4 6.7 mA
Shutdown Supply Current I
SHDN
Soft shutdown through SPI 13 24 µA
SPI CHARACTERISTICS
Input-Voltage Low V
IL
0.8 V
V
CC
= 5V 2.0
Input-Voltage High V
IH
V
CC
= 3.3V 1.65
V
Input Leakage Current I
IN
±1 µA
Input Capacitance C
IN
5pF
SPI TIMING CHARACTERISTICS
SCLK Frequency f
SCLK
(Note 5) 5 MHz
SCLK Period t
CP
200 ns
SCLK Pulse-Width High t
CH
80 ns
SCLK Pulse-Width Low t
CL
80 ns
CS Fall to SCLK Rise Setup t
CSS
80 ns
CS Fall to SCLK Rise Hold t
CSH
20 + (0.5
x t
CP
)
ns
DIN to SCLK Setup t
DS
55 ns
DIN Hold after SCLK t
DH
0ns
SCLK Rise to CS Fall Delay t
CS0
20 ns
CS Rise to SCLK Rise Hold t
CS1
80 ns
CS Pulse-Width High t
CSW
200 ns