Datasheet
MAX9880A Evaluation Kit
Evaluates: MAX9880A
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Digital Audio Interface 1 - Basic
This window provides basic controls for configuring the
digital audio interfaces. In this window, when making
configuration changes, the Configure button must be
pressed for the settings to be applied to the device. See
Table 8 for a description of the controls on the interface’s
basic window shown in Figure 8.
Digital Audio Interface 1 - Advanced
The advanced window (Figure 9) provides more direct
configuration of each digital audio interface. The window
is divided into several group boxes, each of which is
described in Table 9. See Table 9 for a description of
the controls on the interface’s advanced window shown in
Figure 9.
Digital Mixers
The audio mixers for the left and right DACs are con-
figured on the DAC Mixer window (Figure 10), which is
opened by selecting the DAC MIX block on the Digital
Audio tab. Selecting the DAI1 checkboxes enables the
DAC gain, voice DAC level, volume control, and filter-
ing blocks for the DAI1 signal path. Selecting the DAI2
checkboxes enables the stereo DAC level, volume con-
trol, and filtering blocks for the DAI2 signal path. See the
Digital Gain Registers, Line Input Registers, and Digital
Filtering Registers sections for block-specific details.
Digital Filtering Registers
The devices’ IIR (voice) and FIR (audio) digital filters are
configured by selecting the appropriate Filtering block
on the Digital Audio tab. Filtering for the DAI1 signal
Figure 8. Digital Audio Interface 1 - Basic Window
Table 9. DAI_ Advanced Window Controls
GROUP BOX DESCRIPTION
Audio Selection
Configures SDOEN_, SDIEN_, and SEL_ of both digital audio interfaces.
Data Loop
Configures the DL_ bit of the audio interface. Also sets the SEL_ bit of the other audio interface if
SDINS1 to SDOUTS2 is selected.
Configuration
Configures MAS_, BSEL_, WCI_, BCI_, DLY_, and HIZOFF_ of the audio interface. Also configures
DMONO for DAI1 (DAI1 window only) and WS and DHF for DAI2 (DAI2 window only).
TDM Mode
Configures TDM_, SLOTL_, SLOTR_, and FSW_.
Data Delay
Configures SLOTDLY_.
Clock Control
Configures PSCLK, FREQ1, NI_, and PLL_. The Rapid Lock Mode checkbox enables rapid lock
mode when the device is configured for slave mode (MAS_ bit = 0) and the PLL_ bit = 1.