Datasheet

MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
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1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9880A
ACKNOWLEDGE FROM MAX9880A
B1 B0B3 B2B5 B4B7 B6
A
A0
ACKNOWLEDGE FROM MAX9880A
R/W
S
A
1 BYTE
ACKNOWLEDGE FROM MAX9880A
B1 B0B3 B2B5 B4B7 B6
P
A
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE 1
DATA BYTE n
Figure 18. Writing n Bytes of Data
ACKNOWLEDGE FROM MAX9880A
1 BYTE
AUTOINCREMENT INTERNAL
REGISTER ADDRESS POINTER
ACKNOWLEDGE FROM MAX9880A
NOT ACKNOWLEDGE FROM MASTER
AA
A
P
A
0
ACKNOWLEDGE FROM MAX9880A
R/W
S
R/WREPEATED START
Sr 1SLAVE ADDRESS REGISTER ADDRESS SLAVE ADDRESS DATA BYTE
Figure 19. Reading 1 Byte of Data
The second byte transmitted from the master config-
ures the MAX9880A’s internal register address pointer.
The pointer tells the MAX9880A where to write the next
byte of data. An acknowledge pulse is sent by the
MAX9880A upon receipt of the address pointer data.
The third byte sent to the MAX9880A contains the data
that is written to the chosen register. An acknowledge
pulse from the MAX9880A signals receipt of the data
byte. The address pointer autoincrements to the next
register address after each received data byte. This
autoincrement feature allows a master to write to
sequential registers within one continuous frame. The
master signals the end of transmission by issuing a
STOP condition. Register addresses greater than 0x17
are reserved. Do not write to these addresses.
Read Data Format
Send the slave address with the R/W bit set to 1 to initi-
ate a read operation. The MAX9880A acknowledges
receipt of its slave address by pulling SDA low during
the 9th SCL clock pulse. A START command followed
by a read command resets the address pointer to reg-
ister 0x00.
The first byte transmitted from the MAX9880A is the
contents of register 0x00. Transmitted data is valid on
the rising edge of SCL. The address pointer autoincre-
ments after each read data byte. This autoincrement
feature allows all registers to be read sequentially within
one continuous frame. A STOP condition can be issued
after any number of read data bytes. If a STOP condi-
tion is issued followed by another read operation, the
first data byte to be read is from register 0x00.
The address pointer can be preset to a specific register
before a read command is issued. The master presets
the address pointer by first sending the MAX9880A’s
slave address with the R/W bit set to 0 followed by the
register address. A repeated START condition is then
sent followed by the slave address with the R/W bit set
to 1. The MAX9880A then transmits the contents of the
specified register. The address pointer autoincrements
after transmitting the first byte.
The master acknowledges receipt of each read byte
during the acknowledge clock pulse. The master must
acknowledge all correctly received bytes except the
last byte. The final byte must be followed by a not
acknowledge from the master and then a STOP condi-
tion. Figure 19 illustrates the frame format for reading 1
byte from the MAX9880A. Figure 20 illustrates the frame
format for reading multiple bytes from the MAX9880A.