Datasheet

MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
______________________________________________________________________________________ 55
BITS FUNCTION
Headphone Amplifier Mode
HPMODE MODE
000 Stereo differential
001 Mono (left) differential
010 Stereo capacitorless
011 Mono (left) capacitorless
100 Stereo single-ended (clickless)
101 Mono (left) single-ended (clickless)
110 Stereo single-ended (fast turn-on)
111 Mono (left) single-ended (fast turn-on)
HPMODE
Note: In mono operation, the right amplifier is disabled.
JDETEN
Jack-Detection Enable
SHDN = 0: Sleep Mode. Enables pullups on JACKSNS/AUX to detect jack insertion.
SHDN = 1: Normal Mode. Enables the comparator circuitry on JACKSNS/AUX to detect voltage changes.
Note: AUXEN must be set to 0 for jack detection to function.
JDWK
Jack-Sense Weak Pullup. Enables an internal pullup. Set JDWK = 1 to enable an internal 4µA current
source. Set JDWK = 0 for external pullup.
Jack Detect Debounce. Configures the JDET debounce time for changes to JKSNS[1:0] according to
information below.
JDEB DEBOUNCE TIME (ms)
00 25
01 50
10 100
JDEB
11 200
Table 24. Mode Configuration Register (continued)
Power Management
The MAX9880A includes complete power management
control to minimize power usage. The DAC and both
ADCs can be independently enabled so that only the
required circuitry is active.
Revision Code
The MAX9880A includes a revision code to allow easy
identification of the device revision. Revision code at
register address 0xFF is not accessible through the SPI
interface and so the revision code is accessible
through SPI at an additional address of 0x214. The cur-
rent revision code is 0x42.