Datasheet

MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
54 ______________________________________________________________________________________
LOUTP
LOUTN
ROUTP
ROUTN
DIFFERENTIAL
LOUTP
LOUTN
ROUTP
ROUTN
CAPACITORLESS
1µF
LOUTP
220µF
LOUTN
SINGLE-ENDED
1µF
ROUTP
220µF
ROUTN
OPTIONAL COMPONENTS REQUIRED FOR CLICK-AND-POP SUPPRESSION ONLY.
Figure 9. Headphone Amplifier Modes
REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
(SEE NOTE)
Mode DSLEW VSEN ZDEN 0 0 HPMODE 0x24
Jack Detect JDETEN 0 JDWK 0 0 0 JDEB 0x25
BITS FUNCTION
DSLEW
Digital Volume Slew Speed
0 = Digital volume changes are slewed over 10ms.
1 = Digital volume changes are slewed over 80ms.
VSEN
Volume Change Smoothing
0 = Volume changes slew through all intermediate values.
1 = Volume changes occur in one step.
ZDEN
Line Input Zero-Crossing Detection
0 = Line input volume changes occur at zero crossings in the audio waveform or after 62ms if no zero
crossing occurs.
1 = Line input volume changes occur immediately.
Table 24. Mode Configuration Register
Headphone Modes
The MAX9880A’s headphone amplifier supports differen-
tial, single-ended, and capacitorless output modes, as
shown in Figure 9. In each mode, the amplifier can be
configured for stereo or mono operation. The single-
ended mode optionally includes click-and-pop reduc-
tion to eliminate the click-and-pop that would normally
be caused by the output coupling capacitor. When
click-and-pop reduction is not required leave LOUTN
and ROUTN unconnected.
Grayed boxes = Not used.
Note: Register addresses listed are for I
2
C. To get the SPI address, add 0x200 with the following exception: Register 0xFF is not
accessible through SPI.