Datasheet

Jack Configuration Change Flag (JDET)
1 = Jack configuration has changed.
0 = No change in jack configuration.
JDET reports changes in JKSNS[1:0]. Changes to
JKSNS[1:0] are debounced before setting JDET. The
debounce period is programmable using the JDEB bits.
Jack status register 0x01 is a read-only register that reports
the status of the jack-detect circuitry when enabled.
Jack Sense (JKSNS)
JKSNS[1:0] reports the status of the JACKSNS pin
when JDETEN = 1. JKSNS[1:0] should be interpreted
according to Table 21.
Jack-Detect Interrupt Enable (IJDET)
Hardware interrupts are reported on the open-drain IRQ
pin. When an interrupt occurs, IRQ remains low until the
interrupt is serviced by reading the status register 0x00.
If a flag is set, it is reported as a hardware interrupt only
if the corresponding interrupt enable is set. Each bit
enables interrupts for the status flag in the respective
bit location in register 0x00. So IJDET must be set to
enable interrupts for jack detect.
Jack-Detect Enable (JDETEN)
Enables the jack-detect circuitry.
Jack-Sense Weak Pullup (JDWK)
Enables a weak internal pullup current for reduced
power loss when the chip is in shutdown or the
MICBIAS is disabled.
JDWK = 0 enables a 2.2kΩ pullup to obtain full jack-
detect operation. This mode can be used to detect
insertion and removal of a plug as well as distinguish
between headphone and headset accessories.
JDWK = 1 enables a 4µA pullup current source when
SHDN = 0 or MICBIAS disabled. In this power-saving
configuration, the circuit can detect insertion and
removal of a plug but cannot distinguish between head-
phone and headset accessories.
The recommended usage follows: Set JDWK = 0 (or set
any bit in the microphone preamplifier gain registers
PALEN[1:0] or PAREN[1:0]). This enables the 2.2kΩ
pullup. Once the jack has been inserted and the type of
accessory determined, set JDWK = 1 to save power.
Once the plug is removed, set JDWK = 0.
MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
______________________________________________________________________________________ 51
Mode Configuration
The MAX9880A includes circuitry to minimize click-and-
pop during volume changes, detect headsets, and con-
figure the headphone amplifier mode. Both volume
slewing and zero-crossing detection are included to
ensure click-and-pop free volume transitions.
Headset Detection Overview
The MAX9880A contains headset detect circuitry that is
capable of detecting the insertion or removal of a plug
and providing information to assist the system controller
in determining the configuration of an inserted plug. If
programmed to do so, upon insertion or removal of a
plug, the IRQ output is asserted (pulled low).
Table 20 shows the registers associated with the jack
detect function in MAX9880A.
Table 21. Jack Sense (JKSNS)
Table 20. Jack-Detect Registers
REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
POR STATE R/W
Status CLD SLD ULK — * * JDET — 0x00 — R
Jack Status JKSNS[1:0] — — — — — — 0x01 — R
Interrupt Enable ICLD ISLD IULK 0 0* 0* IJDET 0 0x04 0x00 R/W
Jack Detect JDETEN 0 JDWK 0 0 0 JDEB 0x25 0x00 R/W
JKSNS[1:0] DESCRIPTION
00 JACKSNS is below V
TH2
(low).
01 JACKSNS is between V
TH1
and V
TH2
(mid).
10 Invalid.
11 JACKSNS is above V
TH1
(high).
Grayed boxes = Not used.