Datasheet

MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
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REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
(SEE NOTE)
Input MXINL MXINR AUXCAP AUXGAIN AUXCAL AUXEN 0x22
BITS FUNCTION
MXINL/MXINR
Left/Right ADC Audio Input Mixer
00 = No input selected
01 = Left/right analog microphone
10 = Left/right line input
11 = Left/right analog microphone + line input
Note: If the right line input is disabled, then the left line input is connected to both mixers. Enabling the left
and right digital microphones disables the left and right audio mixer, respectively. See the DIGMICL/
DIGMICR bit description for more details.
AUXCAP
Auxiliary Input Capture
0 = Update AUX with the voltage at JACKSNS/AUX.
1 = Hold AUX for reading.
AUXGAIN
Auxiliary Input Gain Calibration
0 = Normal operation
1 = The input buffer is disconnected from JACKSNS/AUX and connected to an internal voltage reference.
While in this mode, read the AUX register and store the value. Use the stored value as a gain
calibration factor, k, on subsequent readings. AUXCAL must remain set for time indicated in Table 17 to
guarantee an accurate offset calibration.
AUXCAL
Auxiliary Input Offset Calibration
0 = Normal operation
1 = JACKSNS/AUX is disconnected from the input and the ADC automatically calibrates out any internal
offsets. AUXCAL must remain set for time indicated in Table 17 to guarantee an accurate offset
calibration.
AUXEN
Auxiliary Input Enable
0 = Use JACKSNS/AUX for jack detection.
1 = Use JACKSNS/AUX for DC measurements.
Note: Set MXINR = 00, ADLEN = 1, and ADREN = 1 when AUXEN = 1.
Table 18. ADC Input Register
Note: Register addresses listed are for I
2
C. To get the SPI address, add 0x200 with the following exception: Register 0xFF is not
accessible through SPI.